Block Preview

Introduction

The X2740 List block (also called DPP - Digital Pulse Processing) allows transferring event data in list mode from the X2740/X2745 board to the PC using the CAEN FELib library endpoint.

DPP Block

Each event can contain:

  • Parameters: Energy, PSD, timestamp, flags, and custom data
  • Waveforms: Up to 512 samples of digitized waveform data (optional)

Important: The block layout changes based on the selected properties. Read this documentation completely to understand all configuration options.

At a glance:
FIFO channels 64 (endpoint 0-63)
Waveform input configurable Wave bus: 1 x 64, 2 x 32, 4 x 16 or 1 x 16 bit
Input format plain std_logic_vector pads, not time-multiplexed
Properties 6: FIFO Channel, Max Waveform Len, Wave bus, Packet mode, First word mode, Commit mode

Pin Description

SE Input 1 bit BIT
Special Event flag. Latched on TRIGGER transition. Use with INFO field to tag special event formats. Multi-Words mode only.
INFO Input 7 bit BIT VECTOR
Info field for arbitrary data. Useful with SE flag to identify custom event types. Multi-Words mode only.
ENERGY Input 16 bit BIT VECTOR
Energy value input. Typical field for Pulse Height Analysis or Charge-to-Digital results. Returned by CAEN FELib ENERGY endpoint field.
PSD Input 16 bit BIT VECTOR
Pulse Shape Discriminator output. Returned by CAEN FELib PSD endpoint field. Predefined fields mode, Multi-Words only.
FINE Input 10 bit BIT VECTOR
Fine timestamp for sub-clock resolution. Predefined fields mode, Multi-Words only.
FLAG_A Input 8 bit BIT VECTOR
User-defined flag A. Returned by CAEN FELib FLAG_A endpoint field.
FLAG_B Input 12 bit BIT VECTOR
User-defined flag B. Returned by CAEN FELib FLAG_B endpoint field. Predefined fields mode, Multi-Words only.
WORD2 Input 63 bit BIT VECTOR
WORD3 Input 63 bit BIT VECTOR
WAVE_ENABLE Input 1 bit BIT

Enable waveform capture for current event.

  • HIGH: Include waveform in event
  • LOW or unconnected: Always include waveform Multi-Words mode only.
WAVE_16_0 Input 16 bit BIT VECTOR
WAVE_CE Input 1 bit BIT

Waveform Clock Enable for decimation.

  • HIGH: Capture current sample
  • LOW: Skip current sample
  • Unconnected: Capture all samples Multi-Words mode only.
TIMESTAMP Input 48 bit BIT VECTOR
48-bit timestamp captured on TRIGGER. Provides event timing information.
TRIGGER Input 1 bit BIT

Event trigger input. L→H transition starts event capture:

  • Latches parameter inputs
  • Begins waveform acquisition
  • Event not transferred until COMMIT (or AUTO mode)
LATCH Input 1 bit BIT
Parameter capture signal. Captures input data before TRIGGER if connected. Parameters captured on TRIGGER if unconnected.
REJECT_ALL Input 1 bit BIT
Reject entire event (parameters + waveform). Sampled on COMMIT signal.
REJECT_WAVE Input 1 bit BIT
Reject waveform only (keep parameters). Sampled on COMMIT signal.
COMMIT Input 1 bit BIT
Flush event to readout FIFO. L→H transition commits the event. Can be left unconnected in AUTO mode.
RUN Input 1 bit BIT

Global acquisition enable.

  • HIGH: Events are accepted
  • LOW: Events are ignored
  • Unconnected: Always enabled
FULL Output 1 bit BIT
Channel FIFO full indicator. HIGH when channel cannot accept new events.
FULL_WAVE Output 1 bit BIT
Waveform buffer full indicator. HIGH when no space for new waveform samples.
FULL_DATA Output 1 bit BIT
Parameter buffer full indicator. HIGH when parameter queue is full.
BUSY Output 1 bit BIT
Processing busy indicator. HIGH when block is processing an event.
WORD1/2/3 Input 62-63 bit

User-defined data words for custom event format.

  • WORD1: 62 bits
  • WORD2: 63 bits
  • WORD3: 63 bits User defined word mode only.
WAVE_64_0 Input 64 bit
64-bit waveform input. Wave bus = 1 x 64 bit.
WAVE_32_0 / WAVE_32_1 Input 32 bit
Two 32-bit waveform inputs. Wave bus = 2 x 32 bit.
WAVE_16_0 to WAVE_16_3 Input 16 bit
Four 16-bit waveform inputs. Wave bus = 4 x 16 bit. Use for transferring multiple processing chains simultaneously.

Properties

Property window

FIFO Channel endpoint

Readout channel FIFO

Default: 0

Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63

Max Waveform Len wave_length

Maximum number of 64 bit waveform samples length

Default: 128

Wave bus w_mode

Organization of the waveform bus (number of wave channels/bit)

Default: 1 x 16 bit

Options: 1 x 64 bit 2 x 32 bit 4 x 16 bit 1 x 16 bit

Packet mode pk_mode

Select between single word packet and multi word packet (only multi-words packed support waveforms)

Default: Multi-Words

Options: Multi-Words Single-Word

First word mode w1_mode

Organization of the first word fields of the packet

Default: Predefined fields

Options: Predefined fields User defined word

Commit mode commit_mode

Select between AUTO (commit after wave), MANUAL (commit signal must be triggered after the end of the wave), DELAYED (Latch commit data and send after wave), PROMPT (commit immediately on commit signal)

Default: AUTO

Options: AUTO MANUAL DELAYED PROMPT

FIFO Channel FIFO Channel
Readout channel endpoint (0-63). Each channel has independent FIFO and endpoint. Cannot instantiate more than one block per channel. Default: 0.
Max Waveform Len Max Waveform Len
Maximum waveform length in 64-bit words. Range: 0 to 512. Default: 128.
Wave bus Wave bus

Waveform input bus configuration.

  • 1 x 64 bit: Single 64-bit input
  • 2 x 32 bit: Two 32-bit inputs
  • 4 x 16 bit: Four 16-bit inputs
  • 1 x 16 bit: Single 16-bit input (4× longer waveforms) Default: 1 x 16 bit.
Packet mode Packet mode

Event packet format.

  • Multi-Words: Full event with parameters and waveforms
  • Single-Word: Compact format (energy + timestamp only) Default: Multi-Words.
First word mode First word mode

Organization of first parameter word.

  • Predefined fields: CAEN-compatible layout (ENERGY, PSD, FLAGS)
  • User defined word: Custom 62-bit data Default: Predefined fields. Multi-Words mode only.
Commit mode Commit mode

Event commit behavior.

  • AUTO: Commit after waveform length reached
  • MANUAL: Wait for explicit COMMIT signal
  • DELAYED: Latch reject flags, commit after wave
  • PROMPT: Commit immediately on COMMIT signal Default: AUTO.

Usage

Event Structure

Events consist of parameters (mandatory) and waveforms (optional):

  ┌────────────────────────────────────────────┐
│                 EVENT                       │
├────────────────────────────────────────────┤
│  Word 1: SE | INFO | ENERGY | PSD | FLAGS  │  ← Parameters
│  Word 2: User data (optional)              │
│  Word 3: User data (optional)              │
├────────────────────────────────────────────┤
│  Waveform samples (0-512)                  │  ← Optional
└────────────────────────────────────────────┘

Packet Modes

Multi-Words Mode

Multi-Words Mode

Full event packet with parameters and optional waveforms. Supports:

  • Multiple parameter words
  • Waveform data up to 512 samples
  • Flexible data organization

Single-Word Mode

Single-Word Mode

Compact single-word event for high-rate applications:

  • Only ENERGY, FLAG_A, and TIMESTAMP
  • No waveform support
  • Optimized readout throughput

First Word Organization

When using Multi-Words mode, you can choose between:

Predefined Fields (CAEN Compatible)

Standard CAEN FELib-compatible bit layout:

Field Size Description
SE 1 bit Special Event flag
INFO 7 bits Info field
ENERGY 16 bits Energy value (PHA/QDC)
PSD 16 bits Pulse Shape Discriminator
FINE 10 bits Fine timestamp
FLAG_A 8 bits User flag A
FLAG_B 12 bits User flag B

User Defined Word

User Defined Word

Complete control over the first word (62 bits):

  • WORD1: 62-bit arbitrary data
  • WORD2: 63-bit arbitrary data
  • WORD3: 63-bit arbitrary data

Wave Bus Configuration

Wave Bus Options

The waveform inputs are plain std_logic_vector pads (no time multiplexing). The Wave bus property chooses how many there are and how wide:

Mode Description Pins Created
1 x 64 bit Single 64-bit waveform word WAVE_64_0 (64-bit)
2 x 32 bit Two 32-bit waveform words WAVE_32_0, WAVE_32_1 (32-bit each)
4 x 16 bit Four 16-bit waveform words WAVE_16_0 to WAVE_16_3 (16-bit each)
1 x 16 bit Single 16-bit (4× longer waveform) WAVE_16_0 (16-bit)

Multiple waves: Use 2x32 or 4x16 to transfer multiple processing outputs simultaneously:

  • Raw ADC signal
  • Trigger filter output
  • Energy filter output
  • Baseline restorer output

Commit Modes

The commit signal controls when events are flushed to the readout FIFO:

Mode Description Use Case
AUTO Commit after waveform completes Simple applications
MANUAL Assert COMMIT after wave ends Custom timing control
DELAYED Latch reject flags, send after wave Pile-up rejection
PROMPT Commit immediately on signal Partial waveforms

AUTO mode: Simplest - just connect TRIGGER, leave COMMIT unconnected.

MANUAL/DELAYED/PROMPT modes: Provide control over event rejection and timing.

Event Timing Diagram

Sequence:

  1. TRIGGER L→H starts event capture
  2. LATCH (optional) captures parameters before trigger
  3. ENERGY and other parameters latched
  4. WAVE_0 samples captured sequentially
  5. COMMIT L→H flushes event to FIFO
  6. BUSY goes low when ready for next event

Reject Signals

Control event acceptance between TRIGGER and COMMIT:

Signal Effect
REJECT_ALL Discard entire event (parameters + waveform)
REJECT_WAVE Keep parameters, discard waveform only

Use cases:

  • Pile-up rejection
  • Pulse shape discrimination filtering
  • Coincidence/anti-coincidence logic

Status Outputs

Output Description
FULL Channel FIFO full - new events will be rejected
FULL_WAVE Waveform buffer full - waveforms will be truncated
FULL_DATA Parameter buffer full - events will be rejected
BUSY New triggers not accepted (processing current event)

Best practice: Monitor FULL signals and gate triggers when buffers are full.

Channel Assignment

The FIFO Channel property (0-63) selects the readout endpoint. Each channel is independent:

  • One List block per channel
  • Channels have independent FIFOs
  • Software reads each channel endpoint separately

Note: there are 64 independent FIFO channels, so up to 64 List blocks can coexist in one design, one per endpoint.

Resources & Timing

  • Latency: 1-2 clock cycles for trigger/commit detection

  • Throughput: Up to 1 event per clock cycle (depends on waveform length)

  • Maximum 512 waveform samples per event
  • 64 independent channels with separate FIFOs
  • Configurable wave bus for flexible waveform input
  • Data transferred via CAEN FELib or SciCompiler SDK

Supported Boards

  • X2740
  • X2745