TM
Block Preview

Introduction

The QDC TM (Charge-to-Digital Converter, Time-Multiplexed) block performs charge integration on time-multiplexed input signals. It sums all input samples within a programmable integration window defined by pre-trigger and post-trigger parameters.

The block is designed for high-speed digitizers processing multiple samples per clock cycle (TM-phase multiplexed data), making it suitable for gamma-ray spectroscopy, scintillator readout, and other pulse-height analysis applications.

Two integration modes are supported:

  • Fixed integration: The integration window has a fixed length defined by PRE_TRIGGER + POST_TRIGGER
  • Variable integration: The integration window is defined by START and STOP trigger signals (Time-over-Threshold mode)

Pin Description

CLK Input 1 bit BIT
System clock input. All internal operations are synchronous to the rising edge.
Default: Default Board Clock
RESET Input 1 bit BIT
Synchronous active-high reset. Clears all internal state, delay lines, and accumulators.
Default: Default Board Reset
DATA_IN Input WordSize × TM bit TM
Time-multiplexed input samples to be integrated. Width is WordSize × TM bits, containing TM parallel samples. Samples are ordered with LSB = oldest (P0), MSB = newest (P[TM-1]).
Default: Must be connected
PRE_TRIGGER Input ceil(log2(PreTriggerWindows × TM)) bit BIT VECTOR
Number of samples before the trigger to include in the integration. Maximum value: PreTriggerWindows × TM. This allows capturing the rising edge of the pulse.
FIXED_INTEGRATION Input 1 bit BIT

Integration mode selection.

  • 1 – Fixed integration: window determined by PRE_TRIGGER + POST_TRIGGER
  • 0 – Variable integration: window determined by START to STOP triggers
Default: 1
POST_TRIGGER Input ceil(log2(PostTriggerWindows × TM)) bit BIT VECTOR
Number of samples after the trigger to include in the integration (fixed mode). Maximum value: PostTriggerWindows × TM. Determines the length of the integration gate.
START Input 1 bit BIT
START_TM_POS Input 2 bit BIT VECTOR
STOP Input 1 bit BIT
STOP_TM_POS Input 2 bit BIT VECTOR
DELAYED_DATA_OUT Output WordSize × TM bit TM
Delayed version of the input data. Delayed by PreTriggerWindows clock cycles to align with trigger processing. Width equals WordSize × TM bits.
ADCS_SUM Output WordSize + ceil(log2(TM)) bit BIT VECTOR
Sum of all TM samples within the current clock cycle. Width equals WordSize + ceil(log2(TM)) bits. Useful for debugging and waveform monitoring.
QDC Output OutputWordSize bit BIT VECTOR
Integrated charge (QDC) output. Contains the sum of all samples within the integration window. Width determined by OutputWordSize property. Valid when QDC_DV = 1.
QDC_DV Output 1 bit BIT
Data valid pulse for the QDC output. HIGH for one clock cycle when QDC contains a valid integrated value.
TRIGGER 1 bit
Start trigger signal (active high pulse). Marks the reference point for the integration window. Alias: START
TRIGGER_TM_POS ceil(log2(TM)) bit
Binary-encoded position of the trigger within the TM frame. Range: 0 to TM-1. Indicates which TM phase the trigger occurred in. Alias: START_TM_POS
TRIGGER_LOW 1 bit
Stop trigger signal for variable integration mode (active high pulse). Used when FIXED_INTEGRATION = 0 to mark the end of integration. Ignored when FIXED_INTEGRATION = 1. Alias: STOP
TRIGGER_LOW_TM_POS ceil(log2(TM)) bit
Binary-encoded position of the stop trigger within the TM frame. Range: 0 to TM-1. Alias: STOP_TM_POS

Properties

Property window

Analog Channel Word Size Wordsize

Set the analog channel word size in bits

Bit-width of each sample within the TM frame. Applies to DATA_IN and DELAYED_DATA_OUT signals. Available values: 16, 32, 64, default 16. Note: This property is typically hidden and auto-configured.

Default: 16

Options: 16 32 64

Time Mux TimeMultiplexing

Set number of samples for each clock cycle

Number of parallel samples processed per clock cycle (TM factor). Available values: 2, 4, 8, 16, 32, default 4.

Default: 4

Options: 2 4 8 16 32

Fixed Integration Time FixedIntegration

Enable fixed integration time

Enable fixed integration time mode. When True, integration window is determined by PRE/POST_TRIGGER values. When False, integration window is determined by START/STOP triggers. Default: True.

Default: True

Number of pre-trigger windows PreTriggerWindows

Set the number of pre-trigger windows (each window is TM samples)

Maximum number of pre-trigger windows (each window is TM samples). Determines the maximum PRE_TRIGGER value and required delay line depth. Range: 1 … 1024, default 128.

Default: 128

Range: 1 – 1024

Number of post-trigger windows PostTriggerWindows

Set the number of post-trigger windows (each window is TM samples)

Maximum number of post-trigger windows (each window is TM samples). Determines the maximum POST_TRIGGER value. Range: 1 … 65535, default 1024.

Default: 1024

Range: 1 – 65535

QDC output word size OutputWordSize

Set the output word size in bits

Bit-width of the QDC output. Should be large enough to avoid overflow during integration. Available values: 16, 32, 64, default 16.

Default: 16

Options: 16 32 64

Usage

Functional Overview

Charge integration principle

The figure shows the integration concept:

  • TRIGGER: The trigger point marking the event
  • PRE-GATE: Samples before the trigger that are included in the integration
  • INTEGRATION TIME: The total integration window (pre-trigger + post-trigger)

The QDC computes the sum of all samples within the integration window:

$$ Q = \sum_{i=t_{start}}^{t_{stop}} x[i] $$

where $t_{start}$ = trigger - PRE_TRIGGER and $t_{stop}$ = trigger + POST_TRIGGER.


Time-Multiplexed Operation

The block processes TM_Factor samples per clock cycle. The integration window boundaries are specified in terms of individual samples (not clock cycles).

The internal logic divides the PRE_TRIGGER and POST_TRIGGER values into:

  • Windows: Number of complete clock cycles
  • Remainder: Position within a clock cycle (0 to TM-1)

This allows sub-clock-cycle precision for the integration boundaries.


Integration Window Calculation

Given:

  • PRE_TRIGGER: Number of samples before the trigger to include
  • POST_TRIGGER: Number of samples after the trigger to include
  • TM: Time-multiplexing factor

The integration window spans:

  • Pre-trigger windows: ceil(PRE_TRIGGER / TM) clock cycles before trigger
  • Post-trigger windows: ceil(POST_TRIGGER / TM) clock cycles after trigger

The total number of integrated samples is approximately PRE_TRIGGER + POST_TRIGGER.


Timing Diagram

 

The diagram shows:

  • DATA_IN_Px: Four TM phases (P0-P3) of input data
  • TRIGGER_START_IN: Start trigger pulse
  • TRIGGER_START_WHERE: TM position of trigger (2 = phase P2)
  • SUM_OUT: Running sum of samples within each clock cycle
  • INTEGRAL_OUT: Accumulated integral value
  • INTEGRAL_DV_OUT: Data valid pulse when integration is complete

In this example, the trigger occurs at phase P2, so:

  • First partial sum: C+D (phases P2 and P3 from trigger clock)
  • Subsequent full sums: A+B+C+D (all 4 phases)
  • Final partial sum: A+B (phases P0 and P1 up to stop point)

Fixed vs Variable Integration

Fixed Integration Mode (FIXED_INTEGRATION = 1):

  • Integration window is determined by PRE_TRIGGER and POST_TRIGGER values
  • The STOP input is ignored
  • Used when pulse shape is consistent and known

Variable Integration Mode (FIXED_INTEGRATION = 0):

  • Integration starts at START trigger
  • Integration stops at STOP trigger
  • PRE_TRIGGER still applies to shift the start point backward
  • Used for Time-over-Threshold (ToT) based integration

Binary Tree Adder

The block uses a pipelined binary tree adder to sum all TM samples within each clock cycle. This architecture:

  • Adds log2(TM) clock cycles of latency
  • Achieves maximum throughput (1 result per clock cycle)
  • Efficiently maps to FPGA DSP resources

Typical Applications

  • Charge integration for scintillator/PMT/SiPM detectors
  • QDC (Charge-to-Digital Converter) for nuclear physics
  • Pulse-height analysis with programmable integration gates
  • Time-over-Threshold based charge measurement