Xilinx
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Introduction

Where the full-graph variant produces every $y[p]$, this IP computes only the one point you care about:

$$ y[p] = \sum_{m=0}^{K-1} x[m] \cdot h[p-m] $$

with $p$ fixed at synthesis time. Because the MAC happens while the samples stream in (at sample $m$ the block adds $x[m] \cdot h[p-m]$ when the index is valid), the block needs no sample memory and only one multiplier, and the answer is ready one clock after the $K$-th sample.

Typical use: matched-filter peak sampling, correlation at a known delay, centre-of-kernel energy estimate.

Double-clicking opens the Convolution Designer in point mode: load and quantise the kernel, pick a test signal (or load your own), see the full offline convolution and drag the marker to choose the point the hardware will compute. The quantised kernel can be exported as CSV (decimal or hex).

The designer includes the spectroscopy kernel generator: presets (triangular, rectangular, parabolic, cusp, cusp/Gaussian with flat top, CR-RC^n, Savitzky-Golay smooth/derivatives, Gaussian derivative of order n, Morlet, CFD, boxcar difference), the parametric trapezoid family with shaping time, edge concavity and optional zero-area parabolic lobes (before/after/both, adjustable overlap), and the preamp deconvolution panel (exponential rise + up to 3 decay constants, pole-cancelling FIR with optional residual sharpening) that can be folded into any generated or loaded kernel.

Pin Description

IN Input InputSize bit BIT VECTOR
Signed input samples. Consumed one per clock during RUN.
Default: Must be connected
START Input 1 bit BIT
Trigger, rising-edge sensitive. Ignored while BUSY=1.
Default: Must be connected
CLK Input 1 bit BIT
Clock.
Default: Default Board Clock
OUT Output InputSize+CoefSize+ceil(log2(K)) bit BIT VECTOR
The computed convolution point y[p]. Signed. Updated on DV.
DV Output 1 bit BIT
One-clock pulse when the result is ready.
BUSY Output 1 bit BIT
High while the K samples are being consumed.

Properties

Input Bit Width InputSize

Bit width of the signed input samples.

Bit width of the signed input samples: 16, 24 or 32.

Default: 16

Options: 16 24 32

Coefficient Bit Width CoefSize

Bit width of each kernel coefficient (signed).

Bit width of each quantised kernel coefficient (signed), 8..32.

Default: 16

Options: 8 10 12 14 16 18 20 24 28 32

Kernel Length KernelLen

Number of kernel coefficients K. The IP captures K samples after START. Mirrored from the Convolution Designer.

Number of kernel coefficients K (2..4096). Mirrored automatically from the Convolution Designer.

Default: 64

Range: 2 – 4096

Kernel (JSON, use editor) ConvProject

Quantised kernel + designer state, produced by the Convolution Designer.

Computed Point PointIndex

Index of the convolution point computed by the hardware (0 .. 2K-2). Picked in the Convolution Designer.

The convolution point computed by the hardware (0 .. 2K-2). Picked graphically in the Convolution Designer (hidden property, mirrored on save).

Default: 63

Range: 0 – 8190

Timing

Phase Duration Description
IDLE - waiting for START rising edge
RUN K clocks consumes one sample per clock, MACs on the fly

DV pulses one clock after the last consumed sample; OUT holds the result until the next completion. BUSY is high during RUN.

Output width

$$ \text{OUT_BITS} = \text{InputSize} + \text{CoefSize} + \lceil \log_2 K \rceil $$

Choosing the point

Point index range is $0 \ldots 2K-2$:

  • $p < K-1$ : the kernel only partially overlaps the beginning of the window,
  • $p = K-1$ : full overlap (this is the “matched filter aligned” point),
  • $p > K-1$ : partial overlap with the end of the window.