Xilinx
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Introduction

The block computes the reciprocal square root of IEEE-754 floating-point inputs. On every rising edge of CLK, if CE = 1, the reciprocal square root unit computes

$$ \mathrm{F}(n) = \frac{1}{\sqrt{\mathrm{A}(n)}}, $$

where input A and output F follow IEEE-754 single or double precision format.

The reciprocal square root is implemented with the Xilinx floating_point IP core configured for Rec_Square_Root operation using Newton-Raphson iteration with blocking flow control, fixed 33-cycle latency, and configurable DSP primitive usage.

Pin Description

A Input Variable bit BIT VECTOR
Floating-point input value (IEEE-754). Width: 32 bits (Single) or 64 bits (Double). Must be positive (A > 0) for valid results. Accepted when CE = 1 and READY_OUT = 1.
Default: Must be connected
CE Input 1 bit BIT
Clock Enable (tvalid), active high. When CE = 1, input A is accepted and reciprocal square root computation begins. Can be tied to ‘1’ for continuous operation.
Default: 1
READY_IN Input 1 bit BIT
Downstream ready signal (tready input), active high. Indicates if downstream logic can accept new data. Can be tied to ‘1’ if backpressure is not needed.
CLK Input 1 bit BIT
Global clock. Every rising edge triggers pipeline advancement. Connected to system acquisition clock.
Default: Default Board Clock
F Output 32 bit BIT VECTOR
Floating-point reciprocal square root output (IEEE-754). Width: 32 bits (Single) or 64 bits (Double). Valid when DV = 1. Result = 1/sqrt(A).
DV Output 1 bit BIT
Data Valid output (tvalid), active high. Indicates when output F contains a valid reciprocal square root. Asserts 33 clock cycles after corresponding CE = 1.
READY_OUT Output 1 bit BIT
Upstream ready signal (tready output), active high. Indicates this block can accept new input data. Used for flow control in streaming pipelines.

Properties

Property window

Float Format FloatFormat

Select between single precision 32 bit and double precision 64 bit

Floating-point precision for both input and output:

  • Single → 32-bit (8-bit exponent, 24-bit mantissa including implicit bit)
  • Double → 64-bit (11-bit exponent, 53-bit mantissa including implicit bit)

The operation preserves the precision format end-to-end.

Default: Single

Options: Single Double

DSP Usage DSPUsage

DSP Usage. Single precision: No [0], Full[9]. Double precision: No[0], Full[75]

DSP primitive allocation for Newton-Raphson iterations:

  • No_Usage → LUT-only implementation (0 DSPs, lower speed)
  • Full_Usage → DSP-optimized (9/75 DSPs for Single/Double, recommended, higher speed)

Full usage provides significantly better timing performance. Note: Double precision requires substantial DSP resources (75 DSP48 slices).

Default: Full_Usage

Options: No_Usage Full_Usage

Functional description

The component computes the reciprocal square root:

$$ F = \frac{1}{\sqrt{A}} $$

The implementation uses Newton-Raphson iteration specialized for reciprocal square root:

$$ x_{n+1} = \frac{x_n}{2} (3 - A \cdot x_n^2) $$

converging to $1/\sqrt{A}$. This single operation is often faster than computing sqrt(A) followed by 1/sqrt(A).

Special cases

IEEE-754 special value handling:

  • 1/sqrt(1) = 1
  • 1/sqrt(0) = +Inf
  • 1/sqrt(x) = NaN for x < 0 (domain error)
  • 1/sqrt(+Inf) = +0
  • 1/sqrt(NaN) = NaN (NaN propagation)

DSP Usage

The DSP Usage property controls Newton-Raphson iteration resources:

Single precision:

  • No_Usage → Pure LUT implementation (0 DSPs, lower speed)
  • Full_Usage → DSP-optimized (9 DSPs, higher speed)

Double precision:

  • No_Usage → Pure LUT implementation (0 DSPs, lower speed)
  • Full_Usage → DSP-optimized (75 DSPs, higher speed)

Full DSP usage significantly improves timing but requires substantial DSP48 resources, especially for double precision.

Timing

The IP has a fixed 33-cycle pipeline latency:

Clock cycle Event
0 Input A presented with CE = 1
33 Output F valid with DV = 1

The READY_IN/READY_OUT handshake signals enable backpressure control for streaming applications.

Typical use cases

  • Vector normalization (x / ||x|| = x × (1/sqrt(x·x)))
  • Fast inverse square root in graphics and physics
  • Mahalanobis distance computation
  • Whitening transformations in machine learning

Performance note

Computing 1/sqrt(x) directly is faster than computing 1/sqrt(x) as two separate operations (sqrt then reciprocal). Use this block when the result needed is the reciprocal square root itself.

For simple normalization, this is often combined with multiplication: normalized = value × (1/sqrt(sum_of_squares))