Block Preview

Introduction

The X2740 Digitizer block implements waveform readout using the high-speed DMA engine and the large DDR4 memory buffer inside the X2740/X2745 boards. This block takes 16-bit waveform signals and, upon trigger, acquires and transfers them to the PC.

Digitizer Block

All acquisition parameters are configured by software using CAEN FELib or the SciCompiler-generated SDK. The acquisition is initialized by a LOW → HIGH transition of the TRIGGER input (except when software trigger is selected).

Important: The acquisition of all 64 channels is always synchronous - when the trigger fires, all channels are captured at the same instant.

At a glance:
Channels 64
Input format plain 16-bit vector per channel, not time-multiplexed
Bits per clock per channel 16
Symbol pins AN0-AN63, CE, TRIGGER
Properties none

Pin Description

AN0 Input 16 bit BIT VECTOR
AN1 Input 16 bit BIT VECTOR
AN2 Input 16 bit BIT VECTOR
AN3 Input 16 bit BIT VECTOR
AN4 Input 16 bit BIT VECTOR
AN5 Input 16 bit BIT VECTOR
AN6 Input 16 bit BIT VECTOR
AN7 Input 16 bit BIT VECTOR
AN8 Input 16 bit BIT VECTOR
AN9 Input 16 bit BIT VECTOR
AN10 Input 16 bit BIT VECTOR
AN11 Input 16 bit BIT VECTOR
AN12 Input 16 bit BIT VECTOR
AN13 Input 16 bit BIT VECTOR
AN14 Input 16 bit BIT VECTOR
AN15 Input 16 bit BIT VECTOR
AN16 Input 16 bit BIT VECTOR
AN17 Input 16 bit BIT VECTOR
AN18 Input 16 bit BIT VECTOR
AN19 Input 16 bit BIT VECTOR
AN20 Input 16 bit BIT VECTOR
AN21 Input 16 bit BIT VECTOR
AN22 Input 16 bit BIT VECTOR
AN23 Input 16 bit BIT VECTOR
AN24 Input 16 bit BIT VECTOR
AN25 Input 16 bit BIT VECTOR
AN26 Input 16 bit BIT VECTOR
AN27 Input 16 bit BIT VECTOR
AN28 Input 16 bit BIT VECTOR
AN29 Input 16 bit BIT VECTOR
AN30 Input 16 bit BIT VECTOR
AN31 Input 16 bit BIT VECTOR
AN32 Input 16 bit BIT VECTOR
AN33 Input 16 bit BIT VECTOR
AN34 Input 16 bit BIT VECTOR
AN35 Input 16 bit BIT VECTOR
AN36 Input 16 bit BIT VECTOR
AN37 Input 16 bit BIT VECTOR
AN38 Input 16 bit BIT VECTOR
AN39 Input 16 bit BIT VECTOR
AN40 Input 16 bit BIT VECTOR
AN41 Input 16 bit BIT VECTOR
AN42 Input 16 bit BIT VECTOR
AN43 Input 16 bit BIT VECTOR
AN44 Input 16 bit BIT VECTOR
AN45 Input 16 bit BIT VECTOR
AN46 Input 16 bit BIT VECTOR
AN47 Input 16 bit BIT VECTOR
AN48 Input 16 bit BIT VECTOR
AN49 Input 16 bit BIT VECTOR
AN50 Input 16 bit BIT VECTOR
AN51 Input 16 bit BIT VECTOR
AN52 Input 16 bit BIT VECTOR
AN53 Input 16 bit BIT VECTOR
AN54 Input 16 bit BIT VECTOR
AN55 Input 16 bit BIT VECTOR
AN56 Input 16 bit BIT VECTOR
AN57 Input 16 bit BIT VECTOR
AN58 Input 16 bit BIT VECTOR
AN59 Input 16 bit BIT VECTOR
AN60 Input 16 bit BIT VECTOR
AN61 Input 16 bit BIT VECTOR
AN62 Input 16 bit BIT VECTOR
AN63 Input 16 bit BIT VECTOR
CE Input 1 bit BIT

Channel Enable for per-sample decimation.

  • HIGH: Current sample is captured
  • LOW: Current sample is discarded
  • Unconnected: All samples captured (forced to ‘1’)

Useful for reducing data rate or conditional sampling.

Default: 1
TRIGGER Input 1 bit BIT

Acquisition trigger input. A LOW → HIGH transition starts the waveform readout process.

Important: The acquisition of all 64 channels is always synchronous. When trigger fires, all channels are captured at the same instant.

If software trigger is enabled via CAEN FELib, this pin can be left unconnected.

ANx (AN0-AN63) Input 16 bit

Waveform input channels (64 total). Each channel is a standard 16-bit input (not time-multiplexed).

Connect to ADC outputs or processing chain outputs. Unconnected channels are automatically forced to 0.

Properties

(none) (none)
The X2740 Digitizer has no configurable properties. All acquisition parameters are configured via CAEN FELib or SDK.

Usage

What the Digitizer Does

The Digitizer is NOT the ADC itself - it is the readout block that:

  1. Receives 16-bit waveform data from the 64 analog input channels
  2. Captures all 64 channels simultaneously when triggered
  3. Stores the waveforms in the DDR4 memory buffer
  4. Transfers the data to the PC via high-speed DMA
  ┌─────────────────────────────────────────────────────────────────┐
│                        Digitizer Flow                           │
│                                                                 │
│   16-bit Signals ─►┌──────────────┐     ┌─────────┐     ┌─────┐│
│   (64 ch)          │              │     │         │     │     ││
│   ═════════════════│  DIGITIZER   │════►│  DDR4   │════►│ DMA │╋══► PC
│                    │              │     │ Buffer  │     │     ││
│   TRIGGER ────────►│              │     │         │     │     ││
│                    └──────────────┘     └─────────┘     └─────┘│
│                           ▲                                     │
│                           │                                     │
│                 L→H starts acquisition                          │
└─────────────────────────────────────────────────────────────────┘

Synchronous Acquisition

All 64 channels are acquired synchronously. When the TRIGGER signal transitions from LOW to HIGH:

  • All channel inputs are sampled at the same clock edge
  • The acquisition continues for the configured record length
  • Data is buffered in DDR4 for transfer to PC

This ensures perfect time alignment between channels for multi-channel analysis.

Input Format

Every ANx pin is a plain 16-bit std_logic_vector: one sample per clock cycle, per channel. The waveform inputs are not time-multiplexed, so a processing chain can be wired straight into them with no TM factor to match and no per-lane unpacking.

Typical Usage

Connect the Digitizer to receive waveforms from the analog inputs or processing chain outputs:

  ┌──────────────┐                         ┌──────────────┐
│  Board       │                         │    X2740     │
│  Analog      │   (or processing)       │  Digitizer   │
│  Inputs      │                         │              │
├──────────────┤                         ├──────────────┤
│ ADC_CH0 ─────┼────────────────────────►│ AN0          │
│ ADC_CH1 ─────┼────────────────────────►│ AN1          │
│ ...          │                         │ ...          │
│ ADC_CH63 ────┼────────────────────────►│ AN63         │
│              │                         │              │
│              │    Trigger logic ──────►│ TRIGGER      │
└──────────────┘                         └──────────────┘

Channel Enable (CE) Pin

The optional CE (Channel Enable) pin allows per-sample data decimation:

CE State Behavior
HIGH Sample is captured and stored
LOW Sample is discarded
Unconnected All samples captured (CE forced to ‘1’)

Use cases for CE:

  • Reduce data rate by decimating samples
  • Conditional sampling based on external logic
  • Synchronize with external timing signals

Software Integration

Acquisition parameters are configured via CAEN FELib or the auto-generated SDK:

c 
  // Example: Configure and start acquisition
CAEN_FELib_Open("x2740://...", &handle);

// Set record length, pre-trigger, etc.
CAEN_FELib_SetValue(handle, "/ch/0/par/RecordLength", "1024");
CAEN_FELib_SetValue(handle, "/ch/0/par/PreTrigger", "100");

// Start acquisition
CAEN_FELib_SendCommand(handle, "/cmd/ArmAcquisition");
CAEN_FELib_SendCommand(handle, "/cmd/SwStartAcquisition");

// Read waveforms
while (running) {
    CAEN_FELib_ReadData(handle, timeout, &data, &size);
    // Process waveforms...
}

Best Practices

  1. All channels synchronous: Trigger affects all 64 channels simultaneously
  2. Unconnected channels: Channels without connections are forced to 0
  3. Trigger timing: Ensure trigger arrives when signals are stable
  4. CE usage: Use CE for decimation only when needed
  5. Buffer management: Monitor DDR4 buffer to avoid overflow

Resources & Timing

  • Latency: 1 clock cycle for trigger detection

  • Throughput: 64 channels × 16 bits per clock = 1024 bits/clock

  • 64 channels with standard 16-bit inputs
  • Data is buffered in DDR4 before DMA transfer to PC
  • All channels acquired synchronously on trigger edge

Supported Boards

  • X2740
  • X2745