Block Preview

Introduction

The G-PORT block provides access to the V2495’s 2 bidirectional front panel I/O channels. Each channel can be configured as input or output, with selectable NIM or TTL signal levels.

These are dedicated front panel connectors on the V2495, separate from the expansion slot interfaces.

Pin Description

IN_0 Input 1 bit BIT
IN_1 Input 1 bit BIT
SEL Input 1 bit BIT
OE Input 1 bit BIT
OUT_0 Output 1 bit BIT
OUT_1 Output 1 bit BIT
INx (IN0, IN1) Input 1 bit

Input signals from FPGA logic (2 channels). When configured as output (OUT/IN = 0), these values are driven to the front panel.

When using mixed mode, force unused input channels to LOW.

OUTx (OUT0, OUT1) Output 1 bit

Output signals to FPGA logic (2 channels). When configured as input (OUT/IN = 1), these provide the signals from the front panel.

In output mode, these reflect the INx values.

NIM/TTL Input 1 bit

Signal level selection for both channels.

  • LOW (0): NIM signal levels
  • HIGH (1): TTL signal levels
OUT/IN Input 1 bit

Direction control for both channels.

  • LOW (0): Channels are outputs (INx → front panel)
  • HIGH (1): Channels are inputs (front panel → OUTx)

Properties

(none) (none)
The G-PORT block has no configurable properties. Direction and signal levels are controlled via the input pins.

Usage

Bidirectional Operation

Each G-PORT channel can operate as input or output:

  ┌──────────────────────────────────────────────────────────────────┐
│                      G-PORT Signal Flow                          │
│                                                                  │
│   ┌─────────────┐                  ┌─────────────┐               │
│   │   FPGA      │═══► IN0,IN1 ════►│             │               │
│   │   Logic     │                  │   G-PORT    │◄══► Front     │
│   │             │◄══ OUT0,OUT1 ◄═══│  (2 ch)     │    Panel      │
│   │             │═══► OUT/IN ─────►│             │               │
│   │             │═══► NIM/TTL ────►│             │               │
│   └─────────────┘                  └─────────────┘               │
└──────────────────────────────────────────────────────────────────┘

Direction Control (OUT/IN)

The OUT/IN signal controls the direction of both channels:

OUT/IN State Channel Direction
LOW (0) Channels are OUTPUTS (FPGA → front panel)
HIGH (1) Channels are INPUTS (front panel → FPGA)

Note: Both channels share the same direction control.

Signal Level Selection (NIM/TTL)

The NIM/TTL signal selects the electrical standard for both channels:

NIM/TTL State Signal Type
LOW (0) NIM (negative logic)
HIGH (1) TTL (positive logic)

Using Mixed Input/Output

To use one G-PORT as input and the other as output:

  1. Set OUT/IN to LOW (output mode)
  2. Force the INx pin of the input channel to LOW
  3. Use the OUTx pin to read the input channel
  ┌─────────────┐
│   Example   │
│             │
│  '0' ──────►│ IN0 (unused, held low)
│             │
│  Logic ────►│ IN1 (driving output)
│             │
│  ◄─── Data ─│ OUT0 (reading input)
│             │
│  OUT/IN='0' │
└─────────────┘

Timing Diagram

Resources & Timing

  • Latency: Minimal (I/O buffer delay only)

  • Throughput: 2 bidirectional channels at FPGA clock rate

  • Fixed front panel location on V2495
  • Shared direction control for both channels
  • Shared NIM/TTL selection for both channels

Supported Boards

  • V2495