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Introduction

This block performs a greater-than comparison between two input values. The comparison mode can be configured to check either strict inequality or include equality:

GREATER mode: $$ \mathrm{OUT} = \begin{cases} 1 & \text{if } \mathrm{IN1} > \mathrm{IN2} \ 0 & \text{otherwise} \end{cases} $$

GREATER EQUAL mode: $$ \mathrm{OUT} = \begin{cases} 1 & \text{if } \mathrm{IN1} \geq \mathrm{IN2} \ 0 & \text{otherwise} \end{cases} $$

Pin Description

IN1 Input Variable bit BIT VECTOR
First input value (compared as the left operand). Width: Input bits (2 to 2048 bits) Interpretation depends on Input sign property.
Default: Must be connected
IN2 Input Variable bit BIT VECTOR
Second input value (compared as the right operand). Width: Input bits (2 to 2048 bits) Must have the same width as IN1.
Default: Must be connected
OUT Output 1 bit BIT

Comparison result output.

  • ‘1’ when IN1 > IN2 (GREATER mode) or IN1 ≥ IN2 (GREATER EQUAL mode)
  • ‘0’ otherwise Width: 1 bit
CLK 1 bit
Clock input (only present when RegisterOutput = Enable). Used to register the comparison result.

Properties

Property window

Input bits InputSize

Set the number of bits of the input

Number of bits for each input value. Range: 2-2048 bits. Both inputs must have the same width.

Default: 16

Range: 2 – 2048

Input sign InputSign

Select the sign/unsign of the input

Selects input interpretation: UNSIGNED (default, treats values as positive binary) or SIGNED (two’s complement, supports negative values).

Default: UNSIGNED

Options: UNSIGNED SIGNED

OP Mode Mode

Select between if consider true also in1 = in2

Comparison operation: GREATER (strict >) or GREATER EQUAL (≥ includes equality case).

Default: GREATER

Options: GREATER GREATER EQUAL

RegisterOutput EnableRegister

Enable one pipeline stage adding a register

Adds an output register stage. Disable (combinational, zero latency) or Enable (registered, 1 clock cycle latency).

Default: Disable

Options: Disable Enable

Functional description

The Greater comparator evaluates whether IN1 is larger than IN2. The OP Mode property controls whether the comparison includes equality.

Comparison Modes

GREATER (strict)

Returns ‘1’ only when IN1 is strictly greater than IN2: $$ \mathrm{OUT} = (\mathrm{IN1} > \mathrm{IN2}) $$

GREATER EQUAL

Returns ‘1’ when IN1 is greater than OR equal to IN2: $$ \mathrm{OUT} = (\mathrm{IN1} \geq \mathrm{IN2}) $$

Signed vs. Unsigned

The Input sign property determines how values are interpreted:

  • UNSIGNED: Standard binary comparison (0 to 2^N - 1)
  • SIGNED: Two’s complement comparison (-2^(N-1) to 2^(N-1) - 1)

For signed numbers, the MSB is the sign bit, and the comparison accounts for negative values.

Example (8-bit)

UNSIGNED:

  • IN1 = 0xFF (255) > IN2 = 0x01 (1) → OUT = 1

SIGNED:

  • IN1 = 0xFF (-1) > IN2 = 0x01 (1) → OUT = 0

Latency and Timing

RegisterOutput Latency (clock cycles)
Disable 0
Enable 1

Typical use cases

  • Threshold detection
  • Range validation
  • Maximum value finding
  • Sorting and ordering operations
  • Control flow decisions