HLS
Block Preview

Introduction

The Fast Trapezoidal core implements a digital trapezoidal shaper optimized for gamma-ray spectroscopy and pulse-height analysis. This trigger is designed to work with exponentially decaying signals from radiation detectors (scintillators, HPGe, CdTe, etc.) and provides both timing (trigger) and energy information.

The core uses Xilinx HLS (High-Level Synthesis) for efficient FPGA implementation, achieving a throughput of 1 sample per clock cycle (II=1).

The algorithm performs:

  1. Pole-zero cancellation (deconvolution) to remove the exponential decay
  2. Trapezoidal shaping with programmable rise time and flat-top
  3. Derivative-based trigger on the shaped signal

Pin Description

DATA_IN Input 16 bit BIT VECTOR
16-bit unsigned input samples from the ADC. Typically connected to a charge-sensitive preamplifier output.
Default: Must be connected
THRS Input 32 bit BIT VECTOR
32-bit signed threshold for trigger generation. The trigger candidate is activated when the derivative of the shaped signal exceeds this value. A typical starting value is 0x00000100 (256).
Default: 256
POLARITY Input 1 bit BIT

Signal polarity selection.

  • 1 – Positive pulses (signal increases with energy)
  • 0 – Negative pulses (signal decreases with energy, internally inverted)
Default: 1
OFFSET Input 16 bit BIT VECTOR
16-bit signed digital offset added to the input signal. Used to shift the baseline level for proper processing.
Default: 0
BIN_NUM Input 8 bit BIT VECTOR
Effective number of bits for polarity inversion. Defines the full-scale value as (1 << BIN_NUM) - 1 for negative polarity inversion. Typically set to the ADC resolution (e.g., 14 for 14-bit ADC).
TRIG_K Input 16 bit BIT VECTOR
Rise time parameter K for the trapezoidal filter, in clock cycles. Determines the integration time and noise filtering. Larger K provides better energy resolution but slower timing. Default: 6 (0x0006).
Default: 6
TRIG_M Input 16 bit BIT VECTOR
Flat-top duration M for the trapezoidal filter, in clock cycles. Should be set to accommodate the maximum charge collection time of the detector. Larger M prevents ballistic deficit but reduces count rate. Default: 8 (0x0008).
Default: 8
DECONV_M Input 24 bit BIT VECTOR
24-bit deconvolution coefficient for pole-zero cancellation. Calculated as: M_Dec = exp(-Ts/tau) * 2^16 where Ts is sampling period and tau is decay constant. Default: 0x007C80 (for typical preamplifier decay times).
Default: 31872
RUN_CFG Input 1 bit BIT

Run/Configuration mode control.

  • 0 – Configuration mode: resets internal state
  • 1 – Run mode: normal operation with trigger enabled Switch from 0 to 1 after configuration to start acquisition.
CLK Input 1 bit BIT
System sampling clock. All internal operations are synchronous to the rising edge.
Default: Default Board Clock
RESET Input 1 bit BIT
Synchronous active-high reset. Clears all internal state and accumulators.
Default: Default Board Reset
DATA_OUT Output 16 bit BIT VECTOR
16-bit delayed and processed input data. Delayed by TRIG_M clock cycles to align with the trigger output. Can be used for waveform capture or energy measurement.
TRIGGER_OUT Output 1 bit BIT
Single-cycle trigger pulse generated at the peak of the shaped signal. Indicates the optimal sampling point for energy measurement.
TRIGGER_DELTA_MON Output 32 bit BIT VECTOR
32-bit signed derivative of the shaped signal. Useful for monitoring and debugging the trigger algorithm. The trigger fires when this value crosses zero after exceeding the threshold.
TRIGGER_TRAP_MON Output 32 bit BIT VECTOR
32-bit signed trapezoidal shaper output. The amplitude at the trigger time corresponds to the pulse energy. Useful for MCA histogram generation.

Properties

Property window

TRIGGER_PRE_LEN Size TRIGGER_PRE_LEN
Size of the internal delay line buffers, in samples. Determines the maximum values for K and M parameters. Must be larger than max(K, M) * 2. Available values: 128, 256, 512, 1024, 2048, 4096, 8192, 16384, default 2048.

Default: 2048

Options: 128 256 512 1024 2048 4096 8192 16384

LARGE_ACC_BITS Size LARGE_ACC_BITS
Bit width of the large accumulator for extended dynamic range. Larger values provide more headroom for long integration times. Available values: 48, 64, 96, default 64.

Default: 64

Options: 48 64 96

Usage

Signal Processing Pipeline

The Fast Trapezoidal trigger processes detector signals through multiple stages:

Fast Trigger Signal Processing

The figure shows:

  • Top: Original exponential signal from the detector (typical of charge-sensitive preamplifier output)
  • Middle: Shaped and deconvolved signal after trapezoidal filtering - the exponential tail is removed, resulting in a symmetric pulse
  • Bottom: Derivative of the shaped signal used for triggering - the zero-crossing indicates the peak position

Algorithm Details

1. Pole-Zero Cancellation (Deconvolution)

The exponential decay of the preamplifier signal is cancelled using a digital deconvolution filter. The DECONV_M parameter (M coefficient) must be calibrated to match the detector’s decay time constant.

The deconvolution coefficient is calculated as:

$$ M_{Dec} = \left\lfloor \frac{256}{e^{T_s / \tau} - 1} \right\rfloor $$

where:

  • $T_s$ is the sampling period (in the same units as $\tau$)
  • $\tau$ is the preamplifier decay time constant
  • The result is truncated to an integer value

Example calculation (Python):

python
  import math

sampling_period = 8e-9      # 8 ns (125 MHz sampling)
tau = 50e-6                 # 50 µs preamplifier decay time

M_Dec = int(256 / (math.exp(sampling_period / tau) - 1))
# Result: M_Dec = 1599999 (0x186A00)
  

For typical preamplifier decay times (50-100 µs) and sampling rates (100-250 MHz), the coefficient is usually in the range of 0x007C80 to 0x200000.

2. Trapezoidal Shaping

After deconvolution, a trapezoidal filter is applied with parameters:

  • K (TRIG_K): Rise time in clock cycles
  • M (TRIG_M): Flat-top duration in clock cycles

The transfer function implements a moving-average differentiator:

$$ s_1[n] = x[n] - x[n-K] $$ $$ s_2[n] = s_1[n] - s_1[n-M] $$ $$ y[n] = \sum_{i=0}^{n} s_2[i] + M \cdot s_2[n] $$

3. Trigger Generation

The trigger is generated when:

  1. The shaped signal derivative (delta) exceeds the threshold
  2. A trigger candidate window opens for 2*K clock cycles
  3. Within this window, the derivative zero-crossing (delta < 0) indicates the peak

Baseline-Free Operation

The trigger implemented as the derivative of a trapezoidal filter does not require the calculation of the baseline because of the nature of the derivative operation itself and the design of the trapezoidal filter.

Key advantages:

  • DC rejection: The derivative operation inherently removes any constant DC offset (baseline). A constant baseline has zero derivative, so it does not affect the trigger threshold comparison.
  • No baseline restorer needed: Unlike leading-edge triggers that compare the signal directly against a threshold, this derivative-based approach is immune to baseline shifts caused by temperature drift, rate-dependent effects, or ground loops.
  • Simplified calibration: The threshold (THRS) only needs to be set above the noise level of the derivative signal, without accounting for baseline variations.
  • Better pile-up handling: The trapezoidal shaper returns to zero between pulses, making it easier to detect closely-spaced events.

This makes the Fast Trapezoidal trigger particularly robust for high-rate spectroscopy applications where baseline fluctuations are common.


Timing and Latency

  • Total latency: 13 clock cycles from input to trigger output
  • Throughput: 1 sample per clock cycle (fully pipelined)
  • The DATA_OUT output is delayed by TRIG_M clock cycles to align with the trigger

Saturation Protection

The core includes automatic saturation detection. When the input reaches 0xFFFF (full scale), the trigger is temporarily inhibited to prevent false triggers from saturated signals.


Configuration vs Run Mode

The RUN_CFG input controls the operating mode:

  • RUN_CFG = 0 (Config mode): Internal accumulators and delay lines are reset
  • RUN_CFG = 1 (Run mode): Normal operation, trigger generation enabled

Always start with RUN_CFG = 0 after power-up or configuration change, then switch to RUN_CFG = 1 for acquisition.


Typical Applications

  • Multi-Channel Analyzer (MCA) for gamma-ray spectroscopy
  • Energy measurement with HPGe, CdTe, SDD detectors
  • X-ray fluorescence (XRF) spectroscopy
  • Nuclear physics experiments
  • Medical imaging (PET, SPECT)