TM
Block Preview

Introduction

This block performs parallel greater-than comparisons on time-multiplexed data streams. Each TM phase is compared independently. See the non-TM Greater component for detailed comparison operation description.

Pin Description

IN1 Input Variable (TM) bit TM
First TM input stream. Width: Input bits × TM Factor. Always TM.
Default: Must be connected
IN2 Input Variable bit TM
Second input (TM or STD). Width depends on IN2 Mode.
Default: Must be connected
OUT_TM Output Variable (TM) bit TM
TM boolean output. Width: TM Factor bits.
OUT Output 1 bit BIT
Collapsed single-bit output (OR reduction).
CLK 1 bit
Clock input (present when RegisterOutput = Enable).

Properties

Property window

Input bits InputSize

Set the number of bits of the input (per TM phase)

Bits per sample (per TM phase). Range: 2-2048.

Default: 16

Range: 2 – 2048

Input sign InputSign

Select the sign/unsign of the input

UNSIGNED or SIGNED interpretation.

Default: UNSIGNED

Options: UNSIGNED SIGNED

TM Factor TMFactor

Select the TM Factor of the input

Time-multiplexing factor: 2, 4, 8, 16, or 32.

Default: 4

Options: 2 4 8 16 32

IN2 Mode IN2_Mode

Select if IN2 is Time-Multiplexed or a single STD signal

TM (phase-matched) or STD (broadcast to all phases).

Default: TM

Options: TM STD

RegisterOutput EnableRegister

Enable one pipeline stage adding a register

Disable (zero latency) or Enable (1 cycle latency).

Default: Disable

Options: Disable Enable

Mode Mode
GREATER (strict >) or GREATER EQUAL (≥).

Functional description

Replicates the Greater comparator N times (where N = TM Factor) for parallel operation. Supports GREATER and GREATER EQUAL modes via the Mode property. Supports both TM-to-TM and TM-to-STD comparison modes.

Latency

RegisterOutput Latency (clock cycles)
Disable 0
Enable 1