Fixed P. Clamp
Limits a signal to a programmable range. Unlike the bit-slicing blocks, which only drop bits, this saturates to arbitrary run-time thresholds.
Introduction
The block computes, in fixed-point arithmetic, $$ \mathrm{OUT} = \min(\max(\mathrm{IN}, \mathrm{LO}), \mathrm{HI}) $$
Every operand and every result carries its own Q format: the number of integer bits, the number of fractional bits and the sign are chosen independently. The binary point is tracked through the whole datapath, so operands with different scaling are aligned automatically – no manual shifting is required, which is the main practical difference with respect to the integer-only arithmetic blocks.
Input domain. LO should be less than or equal to HI; if not, the output is forced to HI.
Pin Description
Properties
Number of INTEGER bits of IN (the sign, when present, uses one of them).
Number of INTEGER bits of the operandIN (1 to 64). When the port is SIGNED one
of these bits carries the sign.
Default: 16
Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Number of FRACTIONAL bits of IN, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.
Number of FRACTIONAL bits of the operandIN (0 to 64), i.e. the bits to the right
of the binary point. Total port width = integer + fractional bits.
Default: 0
Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Select whether IN is signed (two’s complement) or unsigned.
Arithmetic type of IN:
- SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
- UNSIGNED – non negative only, range $[0, 2^{N_{int}})$
Default: SIGNED
Options: UNSIGNED SIGNED
Number of INTEGER bits of LO (the sign, when present, uses one of them).
Number of INTEGER bits of the operandLO (1 to 64). When the port is SIGNED one
of these bits carries the sign.
Default: 16
Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Number of FRACTIONAL bits of LO, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.
Number of FRACTIONAL bits of the operandLO (0 to 64), i.e. the bits to the right
of the binary point. Total port width = integer + fractional bits.
Default: 0
Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Select whether LO is signed (two’s complement) or unsigned.
Arithmetic type of LO:
- SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
- UNSIGNED – non negative only, range $[0, 2^{N_{int}})$
Default: SIGNED
Options: UNSIGNED SIGNED
Number of INTEGER bits of HI (the sign, when present, uses one of them).
Number of INTEGER bits of the operandHI (1 to 64). When the port is SIGNED one
of these bits carries the sign.
Default: 16
Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Number of FRACTIONAL bits of HI, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.
Number of FRACTIONAL bits of the operandHI (0 to 64), i.e. the bits to the right
of the binary point. Total port width = integer + fractional bits.
Default: 0
Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Select whether HI is signed (two’s complement) or unsigned.
Arithmetic type of HI:
- SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
- UNSIGNED – non negative only, range $[0, 2^{N_{int}})$
Default: SIGNED
Options: UNSIGNED SIGNED
Number of INTEGER bits of OUT (the sign, when present, uses one of them).
Number of INTEGER bits of the resultOUT (1 to 64). When the port is SIGNED one
of these bits carries the sign.
Default: 16
Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Number of FRACTIONAL bits of OUT, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.
Number of FRACTIONAL bits of the resultOUT (0 to 64), i.e. the bits to the right
of the binary point. Total port width = integer + fractional bits.
Default: 0
Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
Select whether OUT is signed (two’s complement) or unsigned.
Arithmetic type of OUT:
- SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
- UNSIGNED – non negative only, range $[0, 2^{N_{int}})$
Default: SIGNED
Options: UNSIGNED SIGNED
ROUND: round to nearest when the output format has fewer fractional bits than the operands. TRUNCATE: drop them (cheaper, adds a negative bias).
- ROUND – round to nearest when discarding fractional bits
- TRUNCATE – discard them (cheaper, introduces a negative bias)
Default: ROUND
Options: TRUNCATE ROUND
YES: clip to the largest representable output value. NO: wrap around. Only matters when the output format is narrower than the operands.
- YES – clip to the largest representable output value on overflow
- NO – wrap around modulo the output width
Default: YES
Options: NO YES
Number of output register stages, i.e. the latency in clock cycles. 0 makes the block purely combinational.
Fixed latency of the block in clock cycles (1 to 8). Higher values ease timing closure without changing the numerical result.Default: 1
Options: 0 1 2 3 4 5 6 7 8
Functional description
$$ \mathrm{OUT} = \min(\max(\mathrm{IN}, \mathrm{LO}), \mathrm{HI}) $$
where
IN– input operand, format $Q_{IN_BitsInt.IN_BitsFract}$LO– input operand, format $Q_{LO_BitsInt.LO_BitsFract}$HI– input operand, format $Q_{HI_BitsInt.HI_BitsFract}$OUT– result, format $Q_{OUT_BitsInt.OUT_BitsFract}$
Fixed-point format
A value with $N_{int}$ integer bits and $N_{frac}$ fractional bits is stored on $N_{int} + N_{frac}$ bits and represents
$$ \text{value} = \frac{\text{raw integer}}{2^{N_{frac}}} $$
When the operand is SIGNED, one of the integer bits carries the sign (two’s complement). Each port is configured independently, so it is perfectly legal to feed a $Q_{16.0}$ signal and a $Q_{2.14}$ coefficient into the same block.
Implementation
Two comparisons and two multiplexers after binary point alignment. The thresholds are run-time inputs, so they can be driven by registers.
Rounding and overflow
Two properties control how the internal full precision result is reduced to the output format:
- Rounding –
ROUNDrounds to nearest when fractional bits are discarded,TRUNCATEsimply drops them. Truncation is cheaper but introduces a systematic negative bias, which accumulates in a long processing chain. - Saturation –
YESclips to the largest representable value,NOwraps around. Wrapping turns a small overflow into a full-scale sign flip, so saturation is strongly recommended for signal processing.
Latency
The PipelineLength property fixes the latency of the block in clock cycles (1 to 8). Raising it helps timing closure at high clock rates and does not change the numerical result. The symbol reports the configured latency.
Typical use cases
- Protecting a downstream block from out-of-range values
- Implementing a programmable limiter
- Enforcing a physical range on a computed quantity