Block Preview

Introduction

The Energy Sampler block captures the energy value from a shaped pulse at a programmable time after the trigger event. This is essential for accurate pulse-height analysis in Multi-Channel Analyzer (MCA) applications.

The block implements pile-up rejection (PUR) to detect and discard events where two or more pulses arrive too close together, which would result in incorrect energy measurements.

Additionally, the block provides energy window filtering to accept only events within a programmable MIN/MAX range, and maintains counters for monitoring trigger rates and rejection statistics.

Pin Description

ENERGY_IN Input WordWidth bit BIT VECTOR
Input signal carrying the shaped pulse energy value. Width is WordWidth bits. Typically connected to the output of a trapezoidal shaper or peak detector.
Default: Must be connected
TRIGGER Input 1 bit BIT
Input trigger signal indicating the start of an event. The energy will be sampled DELAY clock cycles after this trigger.
MIN Input WordWidth bit BIT VECTOR
Minimum energy threshold for window filtering. Events with ENERGY < MIN are rejected and counted in COUNTER_MMRJ.
Default: 0
MAX Input WordWidth bit BIT VECTOR
Maximum energy threshold for window filtering. Events with ENERGY > MAX are rejected and counted in COUNTER_MMRJ.
Default: 65535
DELAY Input 1 bit INT
Number of clock cycles between trigger and energy sampling. Should be set to sample at the flat-top of the shaped pulse. Typical values depend on the shaper rise time (K) and flat-top (M).
PUR_ENABLE Input 1 bit BIT

Enable pile-up rejection logic.

  • 1 – Enable PUR: reject events with pile-up
  • 0 – Disable PUR: accept all triggered events
Default: 1
PILEUP_EXTRA Input 1 bit INT
Additional hold time (in clock cycles) after sampling before accepting new triggers. Extends the dead-time to ensure complete pulse separation.
Default: 0
CE Input 1 bit BIT
Clock enable. When LOW, the block pauses processing.
Default: 1
CLK Input 1 bit BIT
System clock input. All internal operations are synchronous to the rising edge.
Default: Default Board Clock
RESET Input 1 bit BIT
Synchronous reset. Clears all internal state and counters.
Default: Default Board Reset
ENERGY_OUT Output WordWidth bit BIT VECTOR
Output energy value for accepted events. Valid when ENERGY_DV = 1. Width equals WordWidth bits.
ENERGY_DV Output 1 bit BIT
Data valid pulse for accepted energy values. HIGH for one clock cycle when ENERGY_OUT contains valid data.
ENERGY_RJ Output 1 bit BIT
Energy rejected pulse. HIGH for one clock cycle when an event is rejected (pile-up or window filter).
ENERGY_DRJ Output 1 bit BIT
Double rejection pulse. HIGH for one clock cycle when pile-up is detected during the delay period (first rejection of a pile-up sequence).
INHIBIT Output 1 bit BIT
Inhibit output for downstream blocks. HIGH during the sampling window when PUR is enabled. Can be used to inhibit baseline restoration during pulse processing.
COUNTER_IN Output 32 bit BIT VECTOR
32-bit counter of total input trigger events. Increments on every trigger, regardless of acceptance/rejection.
COUNTER_OUT Output 32 bit BIT VECTOR
32-bit counter of accepted events. Increments when ENERGY_DV pulses (events within window and no pile-up).
COUNTER_PRJ Output 32 bit BIT VECTOR
32-bit counter of pile-up rejected events. Increments for each event rejected due to pile-up detection.
COUNTER_MMRJ Output 32 bit BIT VECTOR
32-bit counter of min/max rejected events. Increments for each event rejected due to energy outside the MIN/MAX window.

Properties

Property window

Word Width WordWidth

Width of the input data in bits

Bit-width of the energy input and output signals. Applies to ENERGY_IN, ENERGY_OUT, MIN and MAX signals. Acceptable range: 4 … 32, default 16.

Default: 16

Range: 4 – 32

Usage

Functional Overview

Energy sampling principle

The figure shows:

  • TRIGGER: The trigger pulse marking the beginning of the event
  • ENERGY SAMPLE: The sampling point where the energy value is captured (after the programmable delay)

The energy value is sampled at a fixed delay after the trigger, corresponding to the peak of the shaped pulse where the energy information is most accurate.

State Machine Operation

The Energy Sampler implements a 4-state machine for pile-up detection and energy sampling:

State 0 (Idle): Waiting for trigger

  • When trigger arrives, start delay countdown and move to State 1
  • If PUR is enabled, set INHIBIT output

State 1 (Delay): Counting down to sampling point

  • If another trigger arrives during delay (pile-up detected):
    • Restart delay counter
    • Set ENERGY_DRJ (double rejection)
    • Move to State 2 (reject mode)
  • If delay completes without pile-up:
    • Sample energy and check MIN/MAX window
    • If within window: output ENERGY_OUT and ENERGY_DV
    • If outside window: output ENERGY_RJ
    • Move to State 3 (extra hold)

State 2 (Pile-up Reject): Rejecting pile-up events

  • Additional triggers restart the delay and increment rejection counter
  • Wait for delay to complete, then move to State 3

State 3 (Extra Hold): Post-sampling hold period

  • If trigger arrives during extra hold: go back to State 2 (pile-up)
  • If PILEUP_EXTRA countdown completes: return to State 0

Pile-Up Rejection (PUR)

When PUR_ENABLE = 1, the block detects pile-up events where multiple triggers occur within the sampling window:

  1. First trigger: Starts the delay counter, INHIBIT goes HIGH
  2. Second trigger during delay: Event is rejected, ENERGY_DRJ pulses
  3. Subsequent triggers: Continue to be rejected, ENERGY_RJ pulses

This ensures that only isolated, well-separated pulses contribute to the energy spectrum.

Energy Window Filtering

The sampled energy is checked against the MIN and MAX thresholds:

  • If MIN <= ENERGY <= MAX: Event is accepted (ENERGY_DV pulses, COUNTER_OUT increments)
  • Otherwise: Event is rejected (ENERGY_RJ pulses, COUNTER_MMRJ increments)

This allows pre-filtering of events based on energy, reducing data rates in high-count-rate applications.

Event Counters

The block provides four 32-bit counters for monitoring:

  • COUNTER_IN: Total number of trigger events received
  • COUNTER_OUT: Number of events accepted (passed window and PUR)
  • COUNTER_PRJ: Number of events rejected due to pile-up
  • COUNTER_MMRJ: Number of events rejected due to MIN/MAX window

Timing Diagram

Typical Applications

  • Pulse-height analysis for gamma-ray spectroscopy
  • Energy measurement with pile-up rejection
  • Multi-Channel Analyzer (MCA) front-end
  • Count-rate monitoring with rejection statistics