Chronometer Enable [TM]
Time-multiplexed chronometer that measures elapsed time (in clock cycles) for multiple parallel data streams. Each TM phase has its own independent counter controlled by a corresponding ENABLE signal. Supports TM factors from 2 to 32, with configurable counter width from 8 to 64 bits.
Introduction
This block implements N independent chronometers (where N = TM Factor) that operate in parallel using time-multiplexed architecture. Each chronometer measures elapsed time for its corresponding data stream.
Key features:
- Parallel time measurement for N data streams
- Independent ENABLE control (TM or scalar mode)
- Zero clock latency - combinational read path
- Configurable counter width (8-64 bits)
- Individual overflow detection per stream
Each TM phase $i$ operates identically to the non-TM version:
$$ \mathrm{TIME}_i(n+1) = \begin{cases} \mathrm{TIME}_i(n) + 1 & \text{if ENABLE}_i=‘1’ \text{ and CE=‘1’} \ \mathrm{TIME}_i(n) & \text{otherwise} \end{cases} $$
Pin Description
Enable input - controls counting operation.
If “Enable is TM” = true (default):
- TM bus of N bits: ENABLE[N-1:0]
- Width = TM Factor
- Each bit controls its corresponding counter
If “Enable is TM” = false:
- Single scalar bit
- Width = 1
- Controls all N counters simultaneously
For each counter $i$:
- ‘1’ = Count enabled (TIME[i] increments)
- ‘0’ = Count paused (TIME[i] holds value)
Automatic reset control (active high, scalar). Applies to all N counters.
- ‘1’ = Each counter resets to 1 when its ENABLE rises from ‘0’ to ‘1’
- ‘0’ = Counters continue from previous value when ENABLE rises
Note: This is a scalar signal shared by all TM phases.
Clock enable input (active high, scalar). Global clock enable for all counters.
When CE=‘0’, all counting is suspended regardless of ENABLE state.
Default: Connects to ‘1’ if left unconnected.
Clock input (scalar). All N counters increment on rising edge when their respective ENABLE signal is ‘1’ and CE=‘1’.
Default: Connects to global clock if left unconnected.
Synchronous reset input (active high, scalar). Resets all N counters to 0.
- ‘1’ = Reset all counters to 0
- ‘0’ = Normal operation
Default: Connects to global reset if left unconnected.
Running status output (TM bus, always TM).
Width: TM Factor bits: RUNNING[N-1:0]
For each phase $i$:
- RUNNING[i] = ‘1’ when counter $i$ is actively counting
- RUNNING[i] = ‘0’ when counter $i$ is paused
This is a registered output, delayed by one clock from ENABLE.
Overflow flag output (TM bus, always TM).
Width: TM Factor bits: OVERFLOW[N-1:0]
For each phase $i$:
- OVERFLOW[i] pulses high for one cycle when counter $i$ overflows
- Occurs when counter reaches 2^BitNumber - 1 and wraps to 0
Use to detect overflow or generate periodic pulses per stream.
Current time count output (TM bus, always TM).
Width: TM Factor × Bit Number
Data format:
- TIME[(i+1)B-1 : iB] = Counter $i$ value (B = Bit Number)
- Example: TM=4, Bits=32 → TIME[127:0]
- TIME[31:0] = Counter 0
- TIME[63:32] = Counter 1
- TIME[95:64] = Counter 2
- TIME[127:96] = Counter 3
Each counter is an unsigned integer representing elapsed clock cycles.
To convert to time: Time (s) = TIME[i] / CLK_Frequency (Hz)
Properties
Number of bits per counter.
Available values: 8, 16, 24, 32, 40, 48, 56, 64
Each of the N counters uses this bit width.
Total output width = BitNumber × TM Factor
Choose the smallest value that meets timing requirements to minimize resource usage.
Time-multiplexing factor (number of parallel counters).
Available values: 2, 4, 8, 16, 32
Determines:
- Number of independent chronometers: N = TMFactor
- Total register count: N × BitNumber
- Output bus widths (TIME, RUNNING, OVERFLOW)
Must match TM factor of connected components.
Selects ENABLE input mode.
true (default): ENABLE is TM bus
- ENABLE width = TM Factor
- Independent control per counter
- Each ENABLE[i] controls counter $i$
false: ENABLE is scalar
- ENABLE width = 1
- Shared control for all counters
- Simpler routing, saves resources
Note: All outputs (TIME, RUNNING, OVERFLOW) are always TM regardless of this setting.
Functional description
The TM chronometer instantiates N parallel counters (where N = TM Factor), each operating independently. All counters share the same clock but have separate control and output signals multiplexed into TM buses.
TM Architecture
The component can operate in two modes based on the Enable is TM property:
Mode 1: TM Enable (Enable is TM = true)
- ENABLE input is TM bus:
ENABLE[N-1:0] - Each counter $i$ controlled by its own
ENABLE[i]bit - Supports independent control per stream
Mode 2: Scalar Enable (Enable is TM = false)
- ENABLE input is single bit
- All N counters controlled by same ENABLE signal
- Synchronized counting across all streams
Time-multiplexed outputs
All outputs are always TM, regardless of input mode:
-
TIME[N*B-1:0]: N counters concatenated (B = Bit Number)
- TIME[B-1:0] = Counter 0
- TIME[2*B-1:B] = Counter 1
- TIME[N*B-1:(N-1)*B] = Counter N-1
-
RUNNING[N-1:0]: N running status bits
- RUNNING[i] = ‘1’ when counter $i$ is actively counting
-
OVERFLOW[N-1:0]: N overflow flags
- OVERFLOW[i] pulses when counter $i$ wraps around
Resource usage
TM implementation requires:
- Registers: N × Bit Number flip-flops
- Logic: N × (counter logic + overflow detection)
- Latency: 0 cycles (combinational outputs)
Example: TM Factor=4, Bit Number=32 → 128 flip-flops (4 × 32)
Timing diagram
This example shows TM Factor=4:
- Counter 0 (ENABLE[0]=‘0’): Remains at 0
- Counter 1 (ENABLE[1] toggles): Counts when enabled, pauses otherwise
- Counter 2 (ENABLE[2]=‘0’): Remains at 0
- Counter 3 (ENABLE[3]=‘1’): Continuously counts
Typical use cases
- Multi-channel timing: Measure timing for parallel data processing paths
- Packet timing: Track processing time for multiple concurrent packets
- Resource utilization: Monitor active time for parallel processing units
- Multi-stream profiling: Performance analysis of TM signal processing chains
- Parallel event duration: Measure duration of events across multiple channels
Design considerations
TM Factor selection
Choose TM factor based on number of parallel streams:
- Must match TM factor of connected components
- Higher TM factor increases resource usage linearly
- Maximum TM factor: 32
Enable mode selection
Use TM Enable when:
- Each stream needs independent timing control
- Different streams have different enable conditions
- Maximum flexibility required
Use Scalar Enable when:
- All streams share the same enable condition
- Reduces routing complexity
- Saves input resources
Bit width selection
Same considerations as non-TM version, but multiplied by TM factor:
| TM Factor | Bit Width | Total Registers | @ 100 MHz Max Time |
|---|---|---|---|
| 2 | 32 | 64 FFs | 42.9 s per stream |
| 4 | 32 | 128 FFs | 42.9 s per stream |
| 8 | 32 | 256 FFs | 42.9 s per stream |
| 16 | 32 | 512 FFs | 42.9 s per stream |
| 32 | 32 | 1024 FFs | 42.9 s per stream |
Performance
- Latency: 0 cycles (combinational outputs available immediately)
- Throughput: All N counters update in parallel each clock cycle
- Frequency: Same as system clock (no timing penalty vs non-TM)