Veto Logic [TM]
Time-multiplexed veto logic gate. Implements IN AND (NOT VETO) operation where IN is TM and VETO is a scalar mask applied to all TM phases. Output is 0 when VETO bit is 1, passes IN when VETO is 0. TM factors: 2-32. Pure combinational (zero latency).
Introduction
This block implements a veto (inhibit) gate for time-multiplexed data. The TM input (IN) passes to the output when the corresponding VETO bit is 0. When a VETO bit is 1, the corresponding output bit is forced to 0.
$$ \mathrm{OUT} = \mathrm{IN} \land \lnot\mathrm{VETO}, $$
Equivalent to: OUT = IN AND (NOT VETO).
Important: IN is time-multiplexed, VETO is a scalar mask applied to all TM phases.
Pin Description
Input Size bits.
When VETO bit is 1, corresponding output bit is forced to 0 in ALL TM phases.
When VETO bit is 0, corresponding input bit passes through unchanged.
Input Size × TM Factor
OUT = IN AND (NOT VETO), where VETO is broadcast to all phases.
Input Size × TM Factor
Each TM phase occupies InputSize bits of the bus.
Properties
Set the size of each input in bits
Number of bits per input sample (per phase). Range: 1 – 16384. VETO has this same width.Default: 16
Range: 1 – 16384
Time Multiplexing factor (number of phases)
Time-multiplexing factor (number of parallel phases). Range: 2 – 32. VETO is applied to all phases.Default: 4
Range: 2 – 32
Functional description
The component implements a bitwise veto operation where:
- IN is time-multiplexed (TM Factor phases)
- VETO is a scalar mask (same InputSize, applied to all phases)
For each TM phase $i$ and each bit position $j$:
$$ \mathrm{OUT}{i}[j] = \mathrm{IN}{i}[j] \land \lnot\mathrm{VETO}[j] $$
The same VETO mask is applied to all TM phases in parallel.
Truth table (per bit)
| IN | VETO | OUT |
|---|---|---|
| 0 | 0 | 0 |
| 1 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 1 | 0 |
When VETO[j] = 1, the bit j is blocked (forced to 0) in all TM phases. When VETO[j] = 0, the bit j passes through unchanged in all TM phases.
Example
With InputSize = 4, TM Factor = 4, VETO = “1010”:
- Bit 3 (VETO=1): blocked in all phases → output always 0
- Bit 2 (VETO=0): passes through in all phases
- Bit 1 (VETO=1): blocked in all phases → output always 0
- Bit 0 (VETO=0): passes through in all phases
Timing
Purely combinational with zero latency.
Typical use cases
- Disabling trigger channels based on external conditions
- Implementing busy/deadtime logic with channel masks
- Multi-channel gating and control
- Bitwise masking of TM data streams