A395D - NIM/TTL Bidirectional I/O
8-channel bidirectional NIM/TTL I/O expansion board for V2495. Each channel can be independently configured as input or output, with selectable NIM or TTL levels.
Introduction
The A395D is an expansion board for the V2495 that provides 8 bidirectional LEMO 00 channels. Each channel can be individually configured as input or output, with selectable NIM or TTL signal levels.
The board can be installed in expansion slots D, E, or F of the V2495 mainboard.
Product link: CAEN A395D
Pin Description
Input signals from FPGA logic (8 total). When the corresponding channel is configured as output (OUT/IN = 1), the INx value is driven to the LEMO connector.
When the channel is configured as input, INx is ignored.
Output signals to FPGA logic (8 total). When the corresponding channel is configured as input (OUT/IN = 0), the OUTx pin provides the signal received from the LEMO connector.
When the channel is configured as output, OUTx reflects the INx value.
Signal level selection (8-bit vector, one bit per channel).
- LOW (0): NIM signal levels
- HIGH (1): TTL signal levels
Set according to your external equipment requirements.
Direction control (8-bit vector, one bit per channel).
- LOW (0): Channel is an input (LEMO → FPGA via OUTx)
- HIGH (1): Channel is an output (FPGA via INx → LEMO)
Properties
Select the socket hosting the expansion board
Selects the expansion socket where the A395D is installed. Available options: D, E, F. Must match the physical installation location on the V2495 mainboard.Default: D
Options: D E F
Usage
Bidirectional Operation
Each of the 8 channels on the A395D can be configured as either input or output:
┌──────────────────────────────────────────────────────────────────┐
│ A395D Bidirectional Flow │
│ │
│ ┌─────────────┐ ┌─────────────┐ │
│ │ FPGA │═══► INx ════════►│ │ │
│ │ Logic │ │ A395D │◄══► LEMO 00 │
│ │ │◄══ OUTx ◄════════│ (8 ch) │ Connector │
│ │ │═══► OUT/IN ─────►│ │ │
│ │ │═══► NIM/TTL ────►│ │ │
│ └─────────────┘ └─────────────┘ │
└──────────────────────────────────────────────────────────────────┘
Direction Control (OUT/IN)
The OUT/IN signal controls the direction of each channel:
| OUT/IN State | Channel Direction |
|---|---|
| LOW (0) | Channel is an INPUT (external → FPGA) |
| HIGH (1) | Channel is an OUTPUT (FPGA → external) |
When configured as input: data from the LEMO connector appears on the OUTx pin. When configured as output: data from the INx pin is driven to the LEMO connector.
Signal Level Selection (NIM/TTL)
The NIM/TTL signal selects the electrical standard:
| NIM/TTL State | Signal Type |
|---|---|
| LOW (0) | NIM (negative logic) |
| HIGH (1) | TTL (positive logic) |
Timing Diagram
Expansion Socket Selection
| Socket | Description |
|---|---|
| D | Expansion slot D |
| E | Expansion slot E |
| F | Expansion slot F |
Signal Characteristics
| Parameter | Value |
|---|---|
| Channels | 8 |
| Connector type | LEMO 00 |
| Signal types | NIM or TTL (selectable) |
| Direction | Bidirectional (per channel) |
Resources & Timing
-
Latency: Minimal (I/O buffer delay only)
-
Throughput: 8 bidirectional channels at FPGA clock rate
- Per-channel direction control
- Per-channel NIM/TTL selection
- LEMO 00 front panel connectors
Supported Boards
- V2495