Xilinx
TM
HLS
Block Preview

Introduction

The block computes, in fixed-point arithmetic, $$ \mathrm{OUT} = \min(\max(\mathrm{IN}, \mathrm{LO}), \mathrm{HI}) $$ This is the time-multiplexed variant: the IN port carries TM samples packed side by side in one wide vector, and the same operation is applied to every slot in the same clock cycle. The scalar variant fixedp_clamp is identical apart from the packing.

Operand LO can either be time-multiplexed as well (slot by slot operation) or a single scalar broadcast to every slot, selected by the B_IsTM property.

Every operand and every result carries its own Q format: the number of integer bits, the number of fractional bits and the sign are chosen independently. The binary point is tracked through the whole datapath, so operands with different scaling are aligned automatically – no manual shifting is required, which is the main practical difference with respect to the integer-only arithmetic blocks.

Input domain. LO should be less than or equal to HI; if not, the output is forced to HI.

Pin Description

IN Input Variable bit TM
Time-multiplexed input operand. Width: (IN Integer Bits + IN Fractional Bits) x TM Factor.
Default: Must be connected
LO Input Variable bit TM
Second operand. When B_IsTM = YES the width is (LO Integer Bits + LO Fractional Bits) x TM Factor and the operation is applied slot by slot; when NO the port is a single sample broadcast to every slot.
Default: Must be connected
HI Input Variable bit TM
Third operand. When C_IsTM = YES it is time-multiplexed, otherwise it is a single sample broadcast to every slot.
Default: Must be connected
IN_DV Input 1 bit BIT
Input data valid, active high. Tie to ‘1’ for free running operation.
OUT Output 16 bit TM
Result, format Q(OUT Integer Bits . OUT Fractional Bits). Width: (OUT Integer Bits + OUT Fractional Bits) x TM Factor, packed like the inputs.
OUT_DV Output 1 bit BIT
Output data valid, asserted when the result is available.
CLK
Processing clock, connected to the acquisition clock.
RESET
Global synchronous reset, active high.

Properties

Property window

IN Integer Bits IN_BitsInt

Number of INTEGER bits of IN (the sign, when present, uses one of them).

Number of INTEGER bits of the operand IN (1 to 64). When the port is SIGNED one of these bits carries the sign.

Default: 16

Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

IN Fractional Bits IN_BitsFract

Number of FRACTIONAL bits of IN, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.

Number of FRACTIONAL bits of the operand IN (0 to 64), i.e. the bits to the right of the binary point. Total port width = integer + fractional bits.

Default: 0

Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

IN Sign IN_Sign

Select whether IN is signed (two’s complement) or unsigned.

Arithmetic type of IN:

  • SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
  • UNSIGNED – non negative only, range $[0, 2^{N_{int}})$

Default: SIGNED

Options: UNSIGNED SIGNED

LO Integer Bits LO_BitsInt

Number of INTEGER bits of LO (the sign, when present, uses one of them).

Number of INTEGER bits of the operand LO (1 to 64). When the port is SIGNED one of these bits carries the sign.

Default: 16

Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

LO Fractional Bits LO_BitsFract

Number of FRACTIONAL bits of LO, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.

Number of FRACTIONAL bits of the operand LO (0 to 64), i.e. the bits to the right of the binary point. Total port width = integer + fractional bits.

Default: 0

Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

LO Sign LO_Sign

Select whether LO is signed (two’s complement) or unsigned.

Arithmetic type of LO:

  • SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
  • UNSIGNED – non negative only, range $[0, 2^{N_{int}})$

Default: SIGNED

Options: UNSIGNED SIGNED

HI Integer Bits HI_BitsInt

Number of INTEGER bits of HI (the sign, when present, uses one of them).

Number of INTEGER bits of the operand HI (1 to 64). When the port is SIGNED one of these bits carries the sign.

Default: 16

Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

HI Fractional Bits HI_BitsFract

Number of FRACTIONAL bits of HI, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.

Number of FRACTIONAL bits of the operand HI (0 to 64), i.e. the bits to the right of the binary point. Total port width = integer + fractional bits.

Default: 0

Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

HI Sign HI_Sign

Select whether HI is signed (two’s complement) or unsigned.

Arithmetic type of HI:

  • SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
  • UNSIGNED – non negative only, range $[0, 2^{N_{int}})$

Default: SIGNED

Options: UNSIGNED SIGNED

OUT Integer Bits OUT_BitsInt

Number of INTEGER bits of OUT (the sign, when present, uses one of them).

Number of INTEGER bits of the result OUT (1 to 64). When the port is SIGNED one of these bits carries the sign.

Default: 16

Options: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

OUT Fractional Bits OUT_BitsFract

Number of FRACTIONAL bits of OUT, i.e. the bits to the right of the binary point. Total width = integer + fractional bits.

Number of FRACTIONAL bits of the result OUT (0 to 64), i.e. the bits to the right of the binary point. Total port width = integer + fractional bits.

Default: 0

Options: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

OUT Sign OUT_Sign

Select whether OUT is signed (two’s complement) or unsigned.

Arithmetic type of OUT:

  • SIGNED – two’s complement, range $[-2^{N_{int}-1}, 2^{N_{int}-1})$
  • UNSIGNED – non negative only, range $[0, 2^{N_{int}})$

Default: SIGNED

Options: UNSIGNED SIGNED

TM Factor TimeMultiplexing

Time multiplexing factor

Time multiplexing factor: 4, 8, 16 or 32 samples packed per port. One operator instance is generated per slot.

Default: 4

Options: 4 8 16 32

LO is TM B_IsTM

YES: operand LO is time multiplexed like IN. NO: it is a single scalar value compared against every TM slot.

  • YES – operand LO is time-multiplexed and is consumed slot by slot
  • NO – operand LO is a single scalar broadcast to every TM slot

Default: YES

Options: NO YES

HI is TM C_IsTM

YES: operand HI is time multiplexed. NO: it is a single scalar bound applied to every TM slot.

  • YES – operand HI is time-multiplexed
  • NO – operand HI is a single scalar broadcast to every TM slot

Default: YES

Options: NO YES

Rounding Rounding

ROUND: round to nearest when the output format has fewer fractional bits than the operands. TRUNCATE: drop them (cheaper, adds a negative bias).

  • ROUND – round to nearest when discarding fractional bits
  • TRUNCATE – discard them (cheaper, introduces a negative bias)

Default: ROUND

Options: TRUNCATE ROUND

Saturation EnableSaturation

YES: clip to the largest representable output value. NO: wrap around. Only matters when the output format is narrower than the operands.

  • YES – clip to the largest representable output value on overflow
  • NO – wrap around modulo the output width

Default: YES

Options: NO YES

Pipeline Length PipelineLength

Number of output register stages, i.e. the latency in clock cycles. 0 makes the block purely combinational.

Fixed latency of the block in clock cycles (1 to 8). Higher values ease timing closure without changing the numerical result.

Default: 1

Options: 0 1 2 3 4 5 6 7 8

Functional description

$$ \mathrm{OUT} = \min(\max(\mathrm{IN}, \mathrm{LO}), \mathrm{HI}) $$

where

  • IN – input operand, format $Q_{IN_BitsInt.IN_BitsFract}$
  • LO – input operand, format $Q_{LO_BitsInt.LO_BitsFract}$
  • HI – input operand, format $Q_{HI_BitsInt.HI_BitsFract}$
  • OUT – result, format $Q_{OUT_BitsInt.OUT_BitsFract}$

Fixed-point format

A value with $N_{int}$ integer bits and $N_{frac}$ fractional bits is stored on $N_{int} + N_{frac}$ bits and represents

$$ \text{value} = \frac{\text{raw integer}}{2^{N_{frac}}} $$

When the operand is SIGNED, one of the integer bits carries the sign (two’s complement). Each port is configured independently, so it is perfectly legal to feed a $Q_{16.0}$ signal and a $Q_{2.14}$ coefficient into the same block.

Implementation

Two comparisons and two multiplexers after binary point alignment. The thresholds are run-time inputs, so they can be driven by registers.

Rounding and overflow

Two properties control how the internal full precision result is reduced to the output format:

  • Rounding – ROUND rounds to nearest when fractional bits are discarded, TRUNCATE simply drops them. Truncation is cheaper but introduces a systematic negative bias, which accumulates in a long processing chain.
  • Saturation – YES clips to the largest representable value, NO wraps around. Wrapping turns a small overflow into a full-scale sign flip, so saturation is strongly recommended for signal processing.

Time multiplexing

The wide ports carry TM samples packed from the least significant bits up:

    bits [W-1 : 0]      -> slot 0
  bits [2W-1 : W]     -> slot 1
  ...
  bits [TM*W-1 : (TM-1)*W] -> slot TM-1

where W is the width of a single sample. One operator instance is generated per slot, so the resource usage scales with the TM factor while the throughput stays one full set of samples per clock.

Latency

The PipelineLength property fixes the latency of the block in clock cycles (1 to 8). Raising it helps timing closure at high clock rates and does not change the numerical result. The symbol reports the configured latency.

Typical use cases

  • Protecting a downstream block from out-of-range values
  • Implementing a programmable limiter
  • Enforcing a physical range on a computed quantity