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    • Getting Started with DT1260 (SciDK)
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    • Getting Started with V2495 (Pattern Generator & Logic Analyzer)
    • Getting Started with DT5550W Petiroc (SiPM Readout)
    • Getting Started with DT5550W Citiroc (SiPM Rate Meter)
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    • Clock
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    • V2495: A395D
    • V2495: G PORT - IO Direction
    • V2495: G PORT - IO 0
    • V2495: G PORT - IO 1
    • V2495: G PORT - NIM TLL Selection
    • V2495: LED VECTOR
    • Variable (Read)
    • Variable (Write)
      • Accumulator Full (TM)
      • Accumulator Simple (TM)
      • ADD [TM]
      • ALU - ADDER
      • ALU - DIVIDER (Pipelined)
      • ALU - FX GAIN
      • ALU - FX OFFSET
      • ALU - GATE DIFFERENTIATOR
      • ALU - GATED INTEGRATOR
      • ALU - SUBTRACTOR
      • Derivative [TM]
      • DSP - ACCUMULATOR
      • DSP - ADD
      • DSP - MULT
      • DSP - SUB
      • Fixed P. Abs
      • Fixed P. Abs TM
      • Fixed P. Accumulator
      • Fixed P. Accumulator TM
      • Fixed P. Acos
      • Fixed P. Acos TM
      • Fixed P. Add
      • Fixed P. Add TM
      • Fixed P. Asin
      • Fixed P. Asin TM
      • Fixed P. Atan2
      • Fixed P. Atan2 TM
      • Fixed P. Atanh
      • Fixed P. Atanh TM
      • Fixed P. Cos
      • Fixed P. Cos TM
      • Fixed P. Cosh
      • Fixed P. Cosh TM
      • Fixed P. Div
      • Fixed P. Div TM
      • Fixed P. Exp
      • Fixed P. Exp TM
      • Fixed P. Lerp
      • Fixed P. Lerp TM
      • Fixed P. Log
      • Fixed P. Log TM
      • Fixed P. MAC
      • Fixed P. MAC TM
      • Fixed P. Magnitude
      • Fixed P. Magnitude TM
      • Fixed P. Mod
      • Fixed P. Mod TM
      • Fixed P. Mult
      • Fixed P. Mult TM
      • Fixed P. Negate
      • Fixed P. Negate TM
      • Fixed P. Polar to Rect
      • Fixed P. Polar to Rect TM
      • Fixed P. Reciprocal
      • Fixed P. Reciprocal TM
      • Fixed P. Rect to Polar
      • Fixed P. Rect to Polar TM
      • Fixed P. Requantize
      • Fixed P. Requantize TM
      • Fixed P. Rsqrt
      • Fixed P. Rsqrt TM
      • Fixed P. Sin
      • Fixed P. Sin TM
      • Fixed P. SinCos
      • Fixed P. SinCos TM
      • Fixed P. Sinh
      • Fixed P. Sinh TM
      • Fixed P. Sqrt
      • Fixed P. Sqrt TM
      • Fixed P. Square
      • Fixed P. Square TM
      • Fixed P. Sub
      • Fixed P. Sub TM
      • Fixed P. Tan
      • Fixed P. Tan TM
      • Fixed P. Tanh
      • Fixed P. Tanh TM
      • Fixed to Float TM
      • Float 1/SQRT TM
      • Float 1/X TM
      • Float ABS TM
      • Float DIV TM
      • Float EXP TM
      • Float LN TM
      • Float MULTIPLY TM
      • Float SQRT TM
      • Float SUBTRACT TM
      • Float SUM TM
      • Float to Fixed TM
      • FLOATING POINT - ABSOLUTE VALUE
      • FLOATING POINT - ADDITION
      • FLOATING POINT - DIVISION
      • FLOATING POINT - EXPONENTIAL
      • FLOATING POINT - FIXED TO FLOAT
      • FLOATING POINT - FLOAT TO FIXED
      • FLOATING POINT - MULTIPLICATION
      • FLOATING POINT - NATURAL LOGARITHM
      • FLOATING POINT - RECIPROCAL (1/X)
      • FLOATING POINT - RECIPROCAL SQUARE ROOT (1/SQRT)
      • FLOATING POINT - SQUARE ROOT
      • FLOATING POINT - SUBTRACTION
      • FX GAIN TM
      • FX OFFSET TM
      • Gate Differentiator (TM)
      • Gated Integrator (TM)
      • Sin-Cos (Cordic)
      • TM - DIVIDER
      • TM - FIXED TO FLOAT CONVERTER
      • TM - FLOAT TO FIXED CONVERTER
      • TM DSP - ADDER
      • TM DSP - MULTIPLIER
      • TM DSP - SUBTRACTOR
      • Left Shift
      • Left Shift [TM]
      • One Fill
      • One Fill [TM]
      • Programmable Left Shift
      • Programmable Left Shift [TM]
      • Programmable Right Shift
      • Programmable Right Shift [TM]
      • Right Shift
      • Right Shift [TM]
      • Right Shift Signed
      • Right Shift Signed [TM]
      • Sign Extend
      • Sign Extend [TM]
      • Slice
      • Slice [TM]
      • Wire Merge
      • Wire Split
      • Zero Fill
      • Zero Fill [TM]
      • A395A - LVDS/ECL Input Expansion
      • A395B - LVDS Output Expansion
      • A395C - ECL Output Expansion
      • A395D - NIM/TTL Bidirectional I/O
      • A395E - DAC Output Expansion
      • ADC Ready
      • AFE5550
      • Altera PLL
      • Citiroc Analog
      • Citiroc Analog - TDC (V2)
      • Citiroc Slow Control
      • Citiroc Trigger
      • Citiroc Trigger - V2
      • DAQ LEMO
      • DT5550W Board Controller
      • G-PORT
      • Gate & Delay (Hardware)
      • H-LINK
      • HV Controller
      • LED Vector
      • Petiroc Analog
      • Petiroc Digital
      • Petiroc Slow Control
      • Petiroc Trigger
      • Sync In
      • Sync Out
      • System Sync
      • User LED
      • Voltage Regulator
      • AND Reduce
      • AND Reduce [TM]
      • Logic AND
      • Logic AND [TM]
      • Logic NOT
      • Logic NOT [TM]
      • Logic OR
      • Logic OR [TM]
      • Logic XOR
      • Logic XOR [TM]
      • Majority
      • Majority Sync
      • OR Reduce
      • OR Reduce [TM]
      • Veto
      • Veto Logic [TM]
      • XOR Reduce
      • XOR Reduce [TM]
      • Between
      • Between [TM]
      • Equal
      • Equal [TM]
      • Find Max/Min
      • Fixed P. Clamp
      • Fixed P. Clamp TM
      • Float Clamp
      • Float Clamp TM
      • Greater
      • Greater [TM]
      • Is Zero
      • Is Zero [TM]
      • Limit
      • Not Equal
      • Not Equal [TM]
      • Smaller
      • Smaller [TM]
      • 2D Histogram
      • Averaged Oscilloscope
      • Citiroc Frame Transfer
      • Citiroc Frame Transfer - (V2)
      • Custom Packet
      • Custom Packet DMA
      • Custom Packet ESS
      • Data Merger
      • Data Merger (ALT)
      • Digitizer
      • DT5771 Digitizer
      • Dual Averaged Oscilloscope
      • Dual Oscilloscope
      • FFT Monitor
      • Frame Transfer (2D Distribution)
      • List
      • List DMA
      • List DMA
      • List ESS
      • Logic Analyzer
      • Oscilloscope
      • Oscilloscope TM
      • Petiroc Frame Transfer
      • Priority Switch
      • Round Robin Arbiter
      • Round Robin Arbiter (FIFO)
      • Spectrum (1D Histogram)
      • UDP Streamer
      • Word Deserializer
      • Word Serializer
      • X2730 Digitizer
      • X2730 List (DPP)
      • X2740 Digitizer
      • X2740 List (DPP)
      • X2751 Digitizer
      • X2751 List (DPP)
      • ALU - FIR FILTER
      • ALU - IIR AVERAGE
      • ALU - NOISE FILTER (MOVING AVERAGE)
      • ALU - NOISE FILTER FIR
      • ALU - PROGRAMMABLE FIR FILTER
      • Bessel (IIR-I)
      • Convolution (triggered, fixed kernel)
      • Convolution (triggered, loadable kernel)
      • Convolution point (1 MAC, fixed kernel)
      • Convolution point (1 MAC, loadable kernel)
      • Cross Correlator (real-time, single lag)
      • Cross Correlator (triggered, full graph)
      • FFT
      • FFT Average
      • FFT Average [TM]
      • FFT Filter
      • FFT Filter Prog
      • FFT Filter TM
      • FFT Filter TM Prog
      • FFT TM Realtime
      • FFT TM Triggered
      • FFT Windowed
      • FFT Windowed Prog
      • FFT Windowed TM
      • FFT Windowed TM Prog
      • IFFT
      • IFFT TM Realtime
      • IIR Bessel - II Order
      • IIR Butterworth - I Order
      • IIR Butterworth - II Order
      • IIR Chebyshev Type 1 - II Order
      • IIR Chebyshev Type 2 - II Order
      • IIR Elliptic - II Order
      • IIR Notch - II Order
      • IIR Resonant (Peak) - II Order
      • Mean Filter
      • Median Filter
      • Tunable IIR - I Order
      • Tunable IIR - II Order
      • Waveform Averager
      • Waveform Averager TM
      • I2C Master
      • Serial Bus - SPI Master
      • Serial Bus - Status Packet RX
      • Serial Bus - Status Packet TX
      • Serial Bus - UART
      • Deserializer (Serial to Parallel)
      • FIFO (Altera/Intel)
      • FIFO (First-In-First-Out)
      • FIFO [TM]
      • Fixed Delay
      • Fixed Delay [TM]
      • Gate and Delay (SW)
      • RAM Dual Port
      • RAM Single Port
      • ROM (Read-Only Memory)
      • Serializer (Parallel to Serial)
      • Single Clock Delay
      • Single Clock Delay [TM]
      • Variable Delay (Programmable)
      • Variable Delay Fine [TM]
      • Variable Delay Group [TM]
      • Binary To Integer
      • Constant Bit (True/False)
      • Constant Bit (True/False) [TM]
      • Constant Bit-Vector
      • Constant Bit-Vector [TM]
      • Constant Fixed-Point
      • Constant Fixed-Point [TM]
      • Constant Floating-Point
      • Constant Floating-Point [TM]
      • Constant Integer
      • Constant Time
      • Custom HDL (NEW)
      • Integer To Binary
      • Polarity Invert
      • Polarity Invert (TM)
      • Signed/Unsigned Converter
      • Signed/Unsigned Converter [TM]
      • STD Logic Vector / TM Converter
      • TM Packer
      • TM Phase Extractor
      • TM Signal Replicator
      • TM Splitter
      • User HDL
      • User HDL Link
      • Demultiplexer
      • Fixed P. Max
      • Fixed P. Max TM
      • Fixed P. Min
      • Fixed P. Min TM
      • Float Max
      • Float Max TM
      • Float Min
      • Float Min TM
      • Multi MUX
      • Multi MUX TM
      • Multiplexer
      • Multiplexer [TM]
      • Select Greater
      • Select Greater [TM]
      • Select Smaller
      • Select Smaller [TM]
      • Baseline Restorer
      • Baseline Restorer TM
      • Energy Sampler
      • ISIS PSD COEF TM
      • ISIS PSD TM
      • MCA
      • MCA HLS
      • MCA Short Signal
      • Min Detector
      • Peak Detector
      • Peak PSD HLS
      • Peak TM
      • PILEUP REJECT
      • Pole-Zero Rise TM
      • Pole-Zero TM
      • Position Sense Detector
      • PSD Qlong/Qshort (Legacy)
      • PUR (SIMPLE)
      • QDC
      • QDC TM
      • QDC/PSD HLS
      • QDC/PSD HLS TM
      • Trapezoidal Shaper FP
      • Trapezoidal Shaper HLS
      • TRP MCA
      • TRP NEW
      • Multichannel Register (CH-Register)
      • Register File
      • Complex CORDIC (mag + phase)
      • Complex Magnitude Approx |A|
      • Complex Magnitude-Squared |A|^2
      • Complex Power / RMS Meter
      • CORDIC Polar -> Rect
      • RF AM Demod (envelope)
      • RF AM Modulator
      • RF CIC + Compensator Decimator
      • RF CIC Decimator (fixed rate)
      • RF CIC Decimator (programmable rate)
      • RF CIC Interpolator (fixed rate)
      • RF CIC Interpolator (programmable rate)
      • RF Complex -> Real (extract I or Q)
      • RF Complex + Constant (DC offset)
      • RF Complex Accumulator (integrate-and-dump)
      • RF Complex Add (A+B)
      • RF Complex AGC (linear)
      • RF Complex Conj-Multiplier (A*conj(B))
      • RF Complex Conjugate
      • RF Complex DC Blocker (IIR HP)
      • RF Complex Gain (real x complex)
      • RF Complex Moving Average
      • RF Complex Negate
      • RF Complex Peak Detector (|A|^2 hold)
      • RF Complex Subtract (A-B)
      • RF Complex Swap I/Q
      • RF FFT (compact)
      • RF FIR (programmable coefs)
      • RF FIR Low-Pass (fixed)
      • RF FM Demod (discriminator)
      • RF FM Modulator
      • RF Goertzel (single tone)
      • RF Goertzel Multi (tone bank)
      • RF Goertzel Sliding (per-sample)
      • RF Halfband Decimator (fixed)
      • RF Halfband Decimator (prog)
      • RF Halfband Interpolator (fixed)
      • RF Halfband Interpolator (prog)
      • RF Hilbert (real -> I/Q)
      • RF IFFT (compact)
      • RF Mixer
      • RF Multi-stage FIR Decimator
      • RF NCO (fixed freq)
      • RF NCO (programmable FTW)
      • RF Real -> Complex (Q=0)
      • RF Real AGC (linear)
      • RF Real DC Blocker (IIR HP)
      • RF Sequential FIR (fixed coefs)
      • RF Sequential FIR (programmable)
      • Bit-Array Synchronizer (CCCC)
      • Both Edge Detector
      • D Flip-Flop (Falling Edge)
      • D Flip-Flop (Rising Edge)
      • D Latch
      • D Latch [TM]
      • Falling Edge Detector
      • Monostable (Pulse Shaper)
      • Rising Edge Detector
      • SR Flip-Flop
      • SR Flip-Flop (Clocked)
      • Synchronizer (Legacy)
      • Blue Noise
      • Brown Noise
      • Exponential Noise
      • Gaussian Noise Generator (GNG)
      • LFSR / PRBS
      • NCO (Numerically Controlled Oscillator)
      • NCO (TM) - Time-Multiplexed
      • Pattern Generator
      • Periodic Pulse
      • Pink Noise
      • Poisson Pulser
      • Pulse Generator (PWM)
      • Random Generator (Arbitrary Distribution, Programmable)
      • Random Generator (Arbitrary Distribution)
      • Rayleigh Noise
      • Sequencer Generator
      • Triangular Noise
      • Uniform Random
      • Violet Noise
      • ALU - MOVING AVERAGE
      • DSP - BLOCK AREA
      • DSP - BLOCK AREA TM
      • DSP - BLOCK AUTOCORRELATION
      • DSP - BLOCK AUTOCORRELATION TM
      • DSP - BLOCK COEFFICIENT OF VARIATION
      • DSP - BLOCK COEFFICIENT OF VARIATION TM
      • DSP - BLOCK CORRELATION
      • DSP - BLOCK CORRELATION TM
      • DSP - BLOCK COVARIANCE
      • DSP - BLOCK COVARIANCE TM
      • DSP - BLOCK CREST FACTOR
      • DSP - BLOCK CREST FACTOR TM
      • DSP - BLOCK ENERGY
      • DSP - BLOCK ENERGY TM
      • DSP - BLOCK KURTOSIS
      • DSP - BLOCK KURTOSIS TM
      • DSP - BLOCK LINEAR REGRESSION
      • DSP - BLOCK LINEAR REGRESSION TM
      • DSP - BLOCK MEAN
      • DSP - BLOCK MEAN ABS
      • DSP - BLOCK MEAN ABS DEVIATION
      • DSP - BLOCK MEAN ABS DEVIATION TM
      • DSP - BLOCK MEAN ABS TM
      • DSP - BLOCK MEAN SQUARE
      • DSP - BLOCK MEAN SQUARE TM
      • DSP - BLOCK MEAN TM
      • DSP - BLOCK MIN MAX
      • DSP - BLOCK MIN MAX TM
      • DSP - BLOCK PEAK COUNT
      • DSP - BLOCK PEAK COUNT TM
      • DSP - BLOCK RMS
      • DSP - BLOCK RMS TM
      • DSP - BLOCK SKEWNESS
      • DSP - BLOCK SKEWNESS TM
      • DSP - BLOCK SLOPE STATS
      • DSP - BLOCK SLOPE STATS TM
      • DSP - BLOCK SNR
      • DSP - BLOCK SNR TM
      • DSP - BLOCK STATISTICS
      • DSP - BLOCK STD DEV
      • DSP - BLOCK STD DEV TM
      • DSP - BLOCK STD ERROR OF MEAN
      • DSP - BLOCK STD ERROR OF MEAN TM
      • DSP - BLOCK SUM
      • DSP - BLOCK SUM TM
      • DSP - BLOCK THRESHOLD COUNT
      • DSP - BLOCK THRESHOLD COUNT TM
      • DSP - BLOCK VARIANCE
      • DSP - BLOCK VARIANCE TM
      • DSP - BLOCK ZERO CROSSINGS
      • DSP - BLOCK ZERO CROSSINGS TM
      • DSP - HISTOGRAM ANALYZER
      • Moving Average (TM)
      • Rolling Variance
      • Chronometer (Enable)
      • Chronometer (Start/Stop)
      • Chronometer Enable [TM]
      • Counter (Both Edges)
      • Counter (Falling Edge)
      • Counter (Rising Edge)
      • Counter Falling Edge (Async)
      • Counter Rising Edge (Async)
      • Fractional Scaler
      • Frequency Meter
      • Scaler (Even Division)
      • Timer (Enable)
      • Timer (Start/Stop)
      • CFD - TM (Constant Fraction Discriminator)
      • Interpolated Trigger - d'
      • Interpolated Trigger - LE
      • Rate Meter (Multi-Channel)
      • Rise Time
      • TDC 500ps
      • TDC 500ps Controller
      • TDC Synchronous
      • Time Over Threshold (Digital)
      • Timestamp Generator
      • Timestamp Generator ESS
      • TOF Spectrum (Time-of-Flight Histogram)
      • Fast Trapezoidal
      • Trigger Derivative
      • Trigger Derivative Rise Time
      • Trigger Derivative TM
      • Trigger LE
      • Trigger LE Hyst
      • Trigger LE TM
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    • legacy-ip
    On this page
    article

    legacy-ip

    legacy-ip - Sci-Compiler user guide

    article

    Clock

    Source block that makes one of the project's clocks available as a 1-bit signal. The picker lists …
    article

    Comment

    Free-text annotation box for the schematic. No pins, no HDL: the compiler skips the whole comment …
    article

    Direct Bus Access

    Raw view of the host register bus: 32-bit read data, 32-bit write data, 32-bit address and the two …
    article

    Analog In

    Board pin block that brings one digitised analog input channel of the board into the diagram. Width, …
    article

    Analog Invert

    DT5550-only board control block: a single 32-bit input, one bit per analog input channel, that …
    article

    Analog Out

    Board pin block that drives one analog output channel (DAC) of the board from the diagram. Width, …
    article

    Digital Input

    Board pin block that brings one physical digital input of the board into the diagram. The pin is …
    article

    Digital Output

    Board pin block that drives one physical digital output of the board from the diagram. The pin is …
    article

    LEMO

    Bidirectional LEMO connector block. Each connector (or connector pair) gets an IN pad, an OUT pad …
    article

    Event

    Register block reduced to its notification line: a single 1-bit output bound to a memory-mapped …
    article

    Register (Read)

    Brings a memory-mapped register written by software into the FPGA fabric. One data output (integer …
    article

    Register (Write)

    Publishes a value from the FPGA fabric to a memory-mapped register, so software can read it. Data …
    article

    Schematic Port (IN)

    Input port of a sub-design page. Becomes an in std_logic_vector port of the generated entity and, …
    article

    Schematic Port (OUT)

    Output port of a sub-design page. Becomes an out std_logic_vector port of the generated entity …
    article

    Signal Generator

    Waveform generator: you draw the pulse in an interactive editor (delta, pulse, exponential, shaped …
    article

    Select State Machine

    Instantiates a finite state machine drawn in the State Machine Editor as a block on the current …
    article

    Multi Channels Sub Design

    Instantiates one sub-design page N times inside a single block. Input ports marked ARRAY are …
    article

    Select Sub-design

    Instantiates another project page as a single block on the current sheet. The block's pins are built …
    article

    Update Sub-design

    Workflow command, not a block: it places nothing. It re-reads the interface of a sub-design page and …
    article

    V2495: A395D

    V2495 expansion-slot block for the A395D mezzanine: 8 bidirectional LEMO 00 channels on one slot, …
    article

    V2495: G PORT - IO Direction

    Control block that selects the direction of the whole V2495 G PORT. A single 1-bit input, forwarded …
    article

    V2495: G PORT - IO 0

    V2495 G-PORT channel 0. One block, two pads - IN drives the connector, OUT reads it - both 1 bit. …
    article

    V2495: G PORT - IO 1

    V2495 G-PORT channel 1. One block, two pads - IN drives the connector, OUT reads it - both 1 bit. …
    article

    V2495: G PORT - NIM TLL Selection

    Control block that selects the electrical standard of the whole V2495 G PORT. A single 1-bit input; …
    article

    V2495: LED VECTOR

    Drives the eight front-panel LEDs of the V2495 as a single 8-bit output port. Bit i lights LED i, so …
    article

    Variable (Read)

    Wireless net, driver side. The block has a single INPUT pin: the signal wired into it is captured …
    article

    Variable (Write)

    Wireless net, consumer side. The block has a single OUTPUT pin driven by the page variable of the …

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